Use VHDL to implement a simple digital Combination Locker State Machine on the Nexys4 FPGA Board. Designed in Xilinx Vivado.
Project Detail: https://www.hackster.io/faweiz/fpga-combination-locker-vhdl-9bc475
Project Video: https://www.youtube.com/watch?v=cchXZhZdQHY
Github: https://github.com/faweiz
Portfolium: https://portfolium.com/faweiz