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bk0010's Issues

STOP key is not handled properly

Now СТОП simply traps the CPU through vector 4 and sets bit 2 in 177716.
This simulates the end result but is not correct.

Real СТОП allegedly works as follows:
1) IRQ1 (unmaskable) is generated
2) CPU attempts to trap through vector ((hi(177716))+2) effectively
(100002) (same as HALT) 
  These addresses are based on 160000 in canon implementations
3) CPU writes PC and PSW to addresses 177674 and 177676, not implemented in BK
3.1) It is highly likely that during this access, bit 2 in 177716 is set
4) CPU receives a BUS ERROR and traps through 4

Original issue reported on code.google.com by [email protected] on 10 May 2010 at 6:51

Compile tiny-fatfs for BK

To implement bootstrapping and .bin loading from SD card, MMS interface and
FAT support are necessary. Elm's library may be naturally the best fit, but
it could require some portage to become compilable with pcc.

Original issue reported on code.google.com by [email protected] on 15 May 2010 at 12:56

Maintainable synchronous 1801VM1 CPU is needed

A fully synchronous вм1-compatible CPU with maintainable code is absolutely
necessary.

The current POP-11 derivative is almost impossible to maintain. It is
_very_ not cycle-accurate, several VM1 features are not implemented while
some features are done PDP-11 way.

Present POP-11 also requires use of a derived clock which is a boo-boo,
even though everything in the core domain lives in the same derived and
buffered clock.

Original issue reported on code.google.com by [email protected] on 28 Jun 2008 at 11:15

Screen RAM should be available to BIN loader

POPCORN.BIN loads itself into screen RAM and starts execution in screen memory.

1) Extend loader window, at least beginning of screen RAM should be available
2) Screen restore should be off by default

Original issue reported on code.google.com by [email protected] on 1 Jun 2010 at 12:12

Caps status is unclear

Latin characters get entered in lowercase, Cyrillic in uppercase. In real
BK it's uppercase by default and both registers must act the same.

Original issue reported on code.google.com by [email protected] on 13 May 2010 at 7:12

50 Hz timer and 177662

Investigate if it really exists.

BKBTL's reference page says that bit 14 in 177662 enables 50Hz timer
interrupt (vector 0100), but any write to 177662 in the real BK seems to
generate bus error.

Original issue reported on code.google.com by [email protected] on 2 Jun 2010 at 3:06

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