Related Issues (20)
- Error when deleting component HOT 4
- Buffer and NOT gate miss input negation HOT 3
- Error when starting simulation HOT 3
- Error when clicking Oscilloscope in Preferences Dialog HOT 1
- Allow 'implicit' OR connections in nets HOT 4
- Input/Output names when copying&pasting HOT 5
- Indicate that "Bulk property editing" is limited to 8 components HOT 3
- Allow subscript in component name HOT 3
- Connect wire with another wire HOT 1
- Component Register n Bit is broken HOT 1
- Net nodes cannot be moved past other nodes HOT 1
- Cannot import SN 74xx.acl HOT 5
- Library explorer allows dragging Circuit into itself HOT 1
- Mnemonics of XNOR gate are off HOT 3
- Feature request: Include inverted gate inputs into mnemonics HOT 1
- Mnemonic of buffer HOT 1
- Should gates support output negation as a property? HOT 4
- Allow in-place replacement of gates via context menu HOT 1
- Allow input naming on gates and maybe any other component type HOT 2
- Add "Input/Output" component to "Input" and "Output" folders of library
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