Comments (3)
from chips.
Yeah, the main reason is that I haven't found a way to test IM0 behaviour. None of the systems I've emulated so far use IM0, and I'm also not aware of CPU tests (like ZEX or FUSE) which test interrupt behaviour.
from chips.
Closing this, as the new cycle-stepped Z80 emulation will have IM0 support (only tested with one-byte instructions like RST though).
(currently this is still in the branch z80-ticked)
from chips.
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from chips.