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System on a Chip - Design for a stepper-motor-control with NIOS II/s µC on Cyclone IV/V FPGA

Home Page: http://gismo141.github.io/Stepper-Motor-Control

TeX 0.01% C 0.41% Makefile 0.02% C++ 0.20% Python 0.01% Stata 0.06% Nu 0.01% Verilog 9.22% VHDL 70.56% Coq 0.52% SystemVerilog 17.75% Tcl 0.91% Shell 0.28% JavaScript 0.05%

stepper-motor-control's Introduction

Stepper-Motor-Control with NIOS II/s and Cyclone IV/V - FPGA

System on a Chip - HT-2014

Documentation History

v1.0.0 Marc Kossmann & Michael Riedel:

  • finalized milestone 1b

v2.0.0 Marc Kossmann & Michael Riedel:

  • finalized milestone 2

v3.0.0 Marc Kossmann & Michael Riedel:

  • finalized milestone 3b

Overview

This project is an example for a system-on-a-chip-design of a stepper-motor-control using the NIOS II/s Processor on the development boards from terasIC.

Project-Overview

Software

The following software is beeing used for the development:

Development

The development is devided into 4 so-called milestones:

1. Basic Processor Development

a) Design-Phase:

  • UML-diagrams;
  • project-planning;
  • tasks-overview;
  • interrupt-service-routines;
  • listing of OS-components (events, mutexes, semaphores, message queues, etc).

b) NIOS II/s Base-Software without stepper-component:

  • Proof-of-Concept with working C-Sources
  • complete Doxygen-documentation
2. NIOS II/s Base-Software with register-interface
  • presenting the solution
    • show control-status (ctrlReg) on red-LEDs (chapter 8.2.4)
    • show speed-status (speedReg) on green-LEDs (chapter 8.2.4)
    • show steps-status (stepsReg) on NIOS-console (with changing values in debug-mode)
    • testing of the steppermotor-ISR by setting the requestbit every 4s
  • development of VHDL-register-interface
    • listing and description of chosen desing-parameters
    • block-diagram of the register-interface showing all signals
    • Proof-of-Concept with working VHDL-Sources
    • available simulation-files
3. Motor-Control-Unit

a) Idea of Design

  • block-diagram for every component
  • state-diagrams (if necessary)
  • textual representation of the design-idea

b) Isolated Control via DE0 / DE2 - Board-Switches

  • presenting the solution
    • metering of the important speedsteps 0, 1 and 7
    • qualitative presentation of every other speedsteps
    • demonstration of every usage-mode
  • Proof-of-Concept with working VHDL-Sources
  • available simulation-files
4. Combined Solution

combining the motor-control-unit with the NIOS II/s Base-Software with register-interface

stepper-motor-control's People

Contributors

gismo141 avatar mpegispg avatar

Stargazers

 avatar Vito Sawayn avatar Ryan Laheney avatar  avatar  avatar Jose Ángel Gumiel avatar  avatar Chandan Iswar Palai avatar  avatar Arnstein avatar

Watchers

 avatar Jose Ángel Gumiel avatar  avatar Chandan Iswar Palai avatar

stepper-motor-control's Issues

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