goldshakil/cosmosfpga

This project and research is directed towards accelerating data bases by using a Cosmos FPGA.

CosmosFPGA

This project and research is directed towards accelerating databases by using a Cosmos FPGA (XC7Z045-3FFG900 Zynq-7000).

Goals of this project (Sub Projects):

1. Connecting COSMOS FPGA to a host PC using Xillybus and then Implementing data transfer over PCIe.
2. Accelerating SQLite by implementing an enhanced version of the merge sort algorithm on the FPGA.
3. Implementing Projection/Selection on Cosmos+ FPGA.

Pre-Requirements:

Download Vivado HLS/Design Suite and SDK from Here.

Part 1: Connecting Cosmos+ FPGA to a host PC over PCIe:

Requirements:

1. Cosmos+ board (can be obtained Here).
2. Xillybus bundle (can be obtained Here).

Documentation and Tutorials:

1. Documentation (can be obtained Here).
2. Tutorials (can be obtained Here).

Part 2: Implementing Enhanced Merge Sort on Cosmos+ FPGA:

Requirements:

1. HLS Code in the FPGA_Merge_Sort directory.
2. Block Diagram can be obtained by following the tutorial Here.
3. SDK Code in the FPGA_Merge_Sort directory.

Useful Resources:

1. HLS Tutorials Here.
2. HLS Driver Function Manual Here.
3. HLS General Manual Here.

Part 3: Implementing Selection/Projection on Cosmos+ FPGA:

Requirements:

1. HLS+SDK code for a Pseudo test in FPGA_Selection_Projection/Pseudo Test
2. HLS+SDK code for an actual RAM table test in FPGA_Selection_Projection/RAM Table Test

Useful Resources:

1. Tutorial on BRAM Interface/Module HERE.

Other Resources:

1. Implementation of heapsort on FPGA.
2. Improving HLS throughput.
3. Improving HLS performance.
4. Measuring Latency on a Bare Metal Zynq Application.

Please create an issue if you have any questions.