greatscottgadgets/luna

Amaranth HDL framework for monitoring, hacking, and developing USB devices

LUNA: an Amaranth HDL library for USB

LUNA is a toolkit for working with USB using FPGA technology, providing gateware and software to enable USB applications.

Some things you can use LUNA for, currently:

• Protocol analysis for Low-, Full-, or High- speed USB. LUNA provides gateware that allow passive USB monitoring when combined with Cynthion and Packetry.
• Creating your own Low-, Full-, High-, or (experimentally) Super- speed USB device. LUNA provides a collection of Amaranth gateware that allows you to easily create USB devices in gateware, software, or a combination of the two.
• Building USB functionality into a new or existing System-on-a-Chip (SoC). LUNA is capable of generating custom peripherals targeting the common Wishbone bus; allowing it to easily be integrated into SoC designs; and the luna-soc library provides simple automation for developing simple SoC designs.

Some things you'll be able to use LUNA for in the future:

• Man-in-the-middle'ing USB communications. The LUNA toolkit will be able to act as a USB proxy, transparently modifying USB data as it flows between a host and a device.
• USB reverse engineering and security research. The LUNA toolkit will serve as an ideal backend for tools like Facedancer; allowing easy emulation and rapid prototyping of compliant and non-compliant USB devices.

Project Structure

This project is broken down into several directories:

• luna -- the primary LUNA python toolkit; generates gateware and provides USB functionality
  • luna/gateware -- the core gateware components for LUNA; and utilities for stitching them together
• examples -- simple LUNA-related examples; mostly gateware-targeted, currently
• docs -- sources for the LUNA Sphinx documentation
• contrib -- contributed/non-core components; such as udev rules
• applets -- pre-made gateware applications that provide useful functionality on their own (e.g., are more than examples)

Project Documentation

LUNA's documentation is captured on Read the Docs. Raw documentation sources are in the docs folder.

Related Projects

• Cynthion: an open source hardware USB test instrument
• Apollo: the firmware that runs on Cynthion's debug controller and which is responsible for configuring its FPGA
• Saturn-V: a DFU bootloader created for Cynthion
• Packetry: software for USB analysis
• Facedancer: software to create USB devices in Python

luna's Issues

Setup: lambdasoc/software/bios/3rdparty/compiler-rt git repository has moved

This is a lambdasoc-bios issue (and it has been reported there), but notifying here as well as it affects the Luna setup flow.

See lambdaconcept/lambdasoc-bios#1 for the fix.

SuperSpeed: Implement USB2 Interactions

Implement any hardware necessary for USB2 interaction. This might include:

• Any necessary disabling of USB2 hardware when USB3 hardware is active.
• Ability to semi-automatically create a USB2 device with similar endpoints / features.

SuperSpeed: Implement Gearing for PHY Interface

Implement PHY-interface gearing compatible with usb3_pipe, and which allows timing to be met on the ECP5. Ideally, this would gear down from 500MHz signaling to 125MHz signaling; and would be done in partially in DDR hardware.

SuperSpeed: Implement Link Orchestration Module

Implement the high-level link module, gathering link components, and adding:

• Link logical idle handling.
• Anything necessary for link error handling.
• Power management transition support hardware.

(Fomu) examples/soc/: "nmigen.build.res.ResourceError: Resource uart#0 does not exist"

This may well be a user error, but this is what I attempted:

With LUNA_PLATFORM=luna.gateware.platform.fomu:FomuPVT

In luna/examples/soc/hello/

$ python3 -m hello_world_soc
module: luna.gateware.platform.fomu  name: FomuPVT
INFO    | __init__    | Building and uploading gateware to attached Fomu PVT/Production...
INFO    | simplesoc   | Physical address allocations:
INFO    | simplesoc   |     00000000-00001000: <luna.gateware.soc.memory.WishboneROM object at 0x7f026399c5b0>
INFO    | simplesoc   |     00001000-00002000: <luna.gateware.soc.memory.WishboneRAM object at 0x7f026399c910>
INFO    | simplesoc   |     00002000-00002004: (rec uart_divisor r_data r_stb w_data w_stb)
INFO    | simplesoc   |     00002004-00002008: (rec uart_rx_data r_data r_stb)
INFO    | simplesoc   |     00002008-0000200c: (rec uart_rx_rdy r_data r_stb)
INFO    | simplesoc   |     0000200c-00002010: (rec uart_rx_err r_data r_stb)
INFO    | simplesoc   |     00002010-00002014: (rec uart_tx_data w_data w_stb)
INFO    | simplesoc   |     00002014-00002018: (rec uart_tx_rdy r_data r_stb)
INFO    | simplesoc   |     00002020-00002024: (rec uart_ev_status r_data r_stb)
INFO    | simplesoc   |     00002024-00002028: (rec uart_ev_pending r_data r_stb w_data w_stb)
INFO    | simplesoc   |     00002028-0000202c: (rec uart_ev_enable r_data r_stb w_data w_stb)
INFO    | simplesoc   |     00002040-00002044: (rec timer_reload r_data r_stb w_data w_stb)
INFO    | simplesoc   |     00002044-00002048: (rec timer_en r_data r_stb w_data w_stb)
INFO    | simplesoc   |     00002048-0000204c: (rec timer_ctr r_data r_stb w_data w_stb)
INFO    | simplesoc   |     00002050-00002054: (rec timer_ev_status r_data r_stb)
INFO    | simplesoc   |     00002054-00002058: (rec timer_ev_pending r_data r_stb w_data w_stb)
INFO    | simplesoc   |     00002058-0000205c: (rec timer_ev_enable r_data r_stb w_data w_stb)
INFO    | simplesoc   |     00002060-00002064: (rec leds_output r_data r_stb w_data w_stb)
INFO    | simplesoc   | 
INFO    | simplesoc   | IRQ allocations:
INFO    | simplesoc   |     0: uart
INFO    | simplesoc   |     1: timer
INFO    | simplesoc   | 
INFO    | simplesoc   | 
Traceback (most recent call last):
  File "/usr/lib/python3.8/runpy.py", line 194, in _run_module_as_main
    return _run_code(code, main_globals, None,
  File "/usr/lib/python3.8/runpy.py", line 87, in _run_code
    exec(code, run_globals)
  File "/home/tim/greatscottgadgets/luna/examples/soc/hello/hello_world_soc.py", line 103, in <module>
    top_level_cli(design, cli_soc=design.soc)
  File "/home/tim/greatscottgadgets/luna/luna/__init__.py", line 140, in top_level_cli
    products = platform.build(fragment,
  File "/home/tim/icebreaker/icebreaker-nmigen-examples/env/src/nmigen/nmigen/build/plat.py", line 95, in build
    plan = self.prepare(elaboratable, name, **kwargs)
  File "/home/tim/icebreaker/icebreaker-nmigen-examples/env/src/nmigen/nmigen/build/plat.py", line 135, in prepare
    fragment = Fragment.get(elaboratable, self)
  File "/home/tim/icebreaker/icebreaker-nmigen-examples/env/src/nmigen/nmigen/hdl/ir.py", line 39, in get
    obj = obj.elaborate(platform)
  File "/home/tim/greatscottgadgets/luna/examples/soc/hello/hello_world_soc.py", line 92, in elaborate
    uart_io = platform.request("uart", 0)
  File "/home/tim/icebreaker/icebreaker-nmigen-examples/env/src/nmigen/nmigen/build/res.py", line 62, in request
    resource = self.lookup(name, number)
  File "/home/tim/icebreaker/icebreaker-nmigen-examples/env/src/nmigen/nmigen/build/res.py", line 57, in lookup
    raise ResourceError("Resource {}#{} does not exist"
nmigen.build.res.ResourceError: Resource uart#0 does not exist

SPIBus should be reworked to be compliant with the new SPIResource naming

Last year, creating the hardware designs, we used sdi and sdo to avoid problematic names. This year, we've standardized on copi and cipo for SPI naming. nmigen-boards now uses the new standard.

We should replace the names:

[ ] In the SPI interface, and its SPIBus.
[ ] In the examples.
[ ] In the ILA.
[ ] In the firmware.

SuperSpeed: Create Hard PIPE PHY Interface

Implement low-level interfacing for working with PIPE PHYs. This includes management of PHY hardware; but does not include PHY interfacing for things like scrambling/de-scrambling, elastic buffer management, etc.

SuperSpeed: Implement simple (no-burst) bulk endpoint

Implement a simple bulk endpoint (with a maximum burst size of 0) as an initial interface.

FaceDancer: Implement Initial Design Specification / RFP

Create an initial design document describing a FaceDancer backend for LUNA.

This should:

• Include plans for the core backend.
• Accommodate future FPGA acceleration, where possible.
• Accommodate fancy USBProxy enhancements.

SuperSpeed: Implement Data Packet Interfaces

Implement modules to:

• Handle Rx of DPPs.
• Handle Tx of DPPs.

SuperSpeed: Implement Control Endpoint

Implement a control endpoint interface that can handle enumeration.

Capacitor mismatch between PCB and schematic.

C44, C45, C46 are present in PCB, but not in schematics.

Support for Pip

I would like to do pip3 install git+https://github.com/greatscottgadgets/luna.

To do this, I would have to copy the contents of requirements.txt into setup.py.
Doing so would also allow me to put https://github.com/greatscottgadgets/luna as
a dependency in the setup.py of another Python project.

Can I make a pull request with such changes? Are maintainers of the project interested
in such a direction?

SuperSpeed: Implement Transaction Packet Interfaces

Implement interfaces required for generating and receiving transaction packets.

Inconsisten marking of component values in the schematics.

Mixed case:
R1,R2,R23,R24,R25 - marked as "10K"
while
R12,R13,R14 - marked as "10k"

Mixed units:
C7,C8,C9,C10,C11,C12,C13,C14,C15,C16,C17,C18,C23,C24,C25,C26 - marked with 0.1u
while
C55,C54,C51,C27,C31,C32,C33,C34,C35,C38,C39,C40,C41,C44,C45,C46,C47,C49 - marked with 0.1uF

SuperSpeed: Implement Transmit Frontend

Implement a transmitter frontend that prepares data to be transmitted to the PHY:

Handle:

• Transmit data scrambling.
• SKP injection for elastic buffer management.

Missing error detection on invalid debug-SPI transactions

01:26:10 <Greg> So I think the problem is in _autodetect_command_shape()  On a fresh power cycle it returns this: autodetect_bits: 000000011111111111111111111111111111111 self.command_bytes: 0 self.register_bytes: 4
01:26:10 <Greg> Note that there is a missing 0 from the start, resulting in 0 instead of 1 command_bytes. CLK starting in the wrong state? I should be able to confirm with a trace.
01:27:34 <ktemkin> possibly; possibly the relevant line isn't charging up quickly enough when the bus is pulled out of tristate
01:27:59 <Greg> If I call _autodetect_command_shape() twice in luna.apollo.spi:78 it gets the correct value, on the second attempt
01:29:32 <ktemkin> mm; I wonder what little subtle hardware difference we're seeing, here
01:35:58 <ktemkin> the fact that the code doesn't error on command lengths of 0B is definitely something I should fix
01:39:38 <Greg> When testing hyperram_diagnostic.py I get Traceback (most recent call last):   File "applets/hyperram_diagnostic.py", line 98, in <module>     debugger.spi.register_write(REGISTER_RAM_REG_ADDR, 0x0)   File "/home/greg/projects/luna/luna/apollo/spi.py", line 107, in register_write     return self.register_transaction(address, value=value, is_write=True)   File "/home/greg/projects/luna/luna/apollo/spi.py", line 87, in
01:39:38 register_transaction     write_flag          = (1 << write_flag_position) if is_write else 0
01:40:03 <Greg> Because write_flag_position ends up as -1
01:40:10 <ktemkin> mhm
01:42:50 <Greg> Ahh, that error wasn't showing up because on interactive_test.py these are the results: call _autodetect_command_shape #1 autodetect_bits: 00000000000000011111111111111111111111111111111 self.command_bytes: 1 self.register_bytes: 4 call _autodetect_command_shape #2 autodetect_bits: 000000000000000011111111111111111111111111111111 self.command_bytes: 2 self.register_bytes: 4
01:44:23 <ktemkin> mhm -- I use smaller command size in the hyperram diagnostic to decrease bus mux size, to be able to run the clock even faster for diagnostic purposes
01:45:43 <Greg> So it doesn't error out, but this fault means it continues forward with the wrong parameters.
01:47:17 <ktemkin> yeah -- it's not right that it accepts a number of bits other than 8n - 1
01:47:35 <ktemkin> that error handling needs to be improved

We should detect invalid command/address shapes and provide better error messages.

Compiling saturn-v fails with arm-none-eabi-gcc 10.2.0

I tried to compile saturn-v and it fails with multiple definition of 'USB_dtype';
deps/usb/usb_standard.h already has #pragma once as a include guard.
Adding a #ifndef include guard didn't help.

I'm also not getting smart from the error message.
dfu_block_offset and usb_setup aren't functions.
usb_cb_reset, usb_reset contains no keyword from the USB_dtypeenum.

Full Build Log

marble@x270 ~/repos/luna/firmware/saturn-v (git)-[master] % git pull
warning: Pulling without specifying how to reconcile divergent branches is
discouraged. You can squelch this message by running one of the following
commands sometime before your next pull:

  git config pull.rebase false  # merge (the default strategy)
  git config pull.rebase true   # rebase
  git config pull.ff only       # fast-forward only

You can replace "git config" with "git config --global" to set a default
preference for all repositories. You can also pass --rebase, --no-rebase,
or --ff-only on the command line to override the configured default per
invocation.

Fetching submodule firmware/lib/tinyusb
Fetching submodule firmware/lib/tinyusb/hw/mcu/microchip/samd/asf4
Fetching submodule firmware/lib/tinyusb/hw/mcu/nordic/nrfx
Fetching submodule firmware/lib/tinyusb/hw/mcu/nxp
Fetching submodule firmware/lib/tinyusb/hw/mcu/sony/cxd56/spresense-exported-sdk
Fetching submodule firmware/lib/tinyusb/hw/mcu/st/st_driver
Fetching submodule firmware/lib/tinyusb/hw/mcu/ti
Fetching submodule firmware/lib/tinyusb/tools/uf2
Fetching submodule firmware/lib/tinyusb/tools/uf2/hidapi
Fetching submodule firmware/saturn-v/deps/sam0
Fetching submodule firmware/saturn-v/deps/usb
Already up to date.

marble@x270 ~/repos/luna/firmware/saturn-v (git)-[master] % git rev-parse HEAD
e72bf698a321f77d05dd430f5ea3c725141beb26

marble@x270 ~/repos/luna/firmware/saturn-v (git)-[master] % git status
On branch master
Your branch is up to date with 'origin/master'.

nothing to commit, working tree clean

marble@x270 ~/repos/luna/firmware/saturn-v (git)-[master] % arm-none-eabi-gcc --version
arm-none-eabi-gcc (Arch Repository) 10.2.0
Copyright (C) 2020 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

marble@x270 ~/repos/luna/firmware/saturn-v (git)-[master] % make clean
rm -f common/startup_samd21.o main.o usb.o common/clock.o deps/usb/class/dfu/dfu.o deps/usb/samd/usb_samd.o deps/usb/usb_requests.o

marble@x270 ~/repos/luna/firmware/saturn-v (git)-[master] % make
arm-none-eabi-gcc -Wall --std=gnu99 -Os -g3 -flto -fdata-sections -ffunction-sections -funsigned-char -funsigned-bitfields -mcpu=cortex-m0plus -mthumb -D __SAMD21G18A__ -I . -D USB_PRODUCT_ID=0x7551 -D USB_VENDOR_ID=0x1209 -D USB_MANUFACTURER_STR='"Great Scott Gadgets"' -D USB_PRODUCT_STR='"LUNA Saturn-V RCM Bootloader"' -D COPYRIGHT_NOTE='"Visit https://githib.com/opendime/DAFU"'  -Ideps/usb -Ideps/sam0/cmsis -Ideps/sam0/include -Ideps/sam0/cmsis/samd21/include -Ideps/sam0/cmsis/samd21/source   -c -o common/startup_samd21.o common/startup_samd21.c
arm-none-eabi-gcc -Wall --std=gnu99 -Os -g3 -flto -fdata-sections -ffunction-sections -funsigned-char -funsigned-bitfields -mcpu=cortex-m0plus -mthumb -D __SAMD21G18A__ -I . -D USB_PRODUCT_ID=0x7551 -D USB_VENDOR_ID=0x1209 -D USB_MANUFACTURER_STR='"Great Scott Gadgets"' -D USB_PRODUCT_STR='"LUNA Saturn-V RCM Bootloader"' -D COPYRIGHT_NOTE='"Visit https://githib.com/opendime/DAFU"'  -Ideps/usb -Ideps/sam0/cmsis -Ideps/sam0/include -Ideps/sam0/cmsis/samd21/include -Ideps/sam0/cmsis/samd21/source   -c -o main.o main.c
arm-none-eabi-gcc -Wall --std=gnu99 -Os -g3 -flto -fdata-sections -ffunction-sections -funsigned-char -funsigned-bitfields -mcpu=cortex-m0plus -mthumb -D __SAMD21G18A__ -I . -D USB_PRODUCT_ID=0x7551 -D USB_VENDOR_ID=0x1209 -D USB_MANUFACTURER_STR='"Great Scott Gadgets"' -D USB_PRODUCT_STR='"LUNA Saturn-V RCM Bootloader"' -D COPYRIGHT_NOTE='"Visit https://githib.com/opendime/DAFU"'  -Ideps/usb -Ideps/sam0/cmsis -Ideps/sam0/include -Ideps/sam0/cmsis/samd21/include -Ideps/sam0/cmsis/samd21/source   -c -o usb.o usb.c
arm-none-eabi-gcc -Wall --std=gnu99 -Os -g3 -flto -fdata-sections -ffunction-sections -funsigned-char -funsigned-bitfields -mcpu=cortex-m0plus -mthumb -D __SAMD21G18A__ -I . -D USB_PRODUCT_ID=0x7551 -D USB_VENDOR_ID=0x1209 -D USB_MANUFACTURER_STR='"Great Scott Gadgets"' -D USB_PRODUCT_STR='"LUNA Saturn-V RCM Bootloader"' -D COPYRIGHT_NOTE='"Visit https://githib.com/opendime/DAFU"'  -Ideps/usb -Ideps/sam0/cmsis -Ideps/sam0/include -Ideps/sam0/cmsis/samd21/include -Ideps/sam0/cmsis/samd21/source   -c -o common/clock.o common/clock.c
arm-none-eabi-gcc -Wall --std=gnu99 -Os -g3 -flto -fdata-sections -ffunction-sections -funsigned-char -funsigned-bitfields -mcpu=cortex-m0plus -mthumb -D __SAMD21G18A__ -I . -D USB_PRODUCT_ID=0x7551 -D USB_VENDOR_ID=0x1209 -D USB_MANUFACTURER_STR='"Great Scott Gadgets"' -D USB_PRODUCT_STR='"LUNA Saturn-V RCM Bootloader"' -D COPYRIGHT_NOTE='"Visit https://githib.com/opendime/DAFU"'  -Ideps/usb -Ideps/sam0/cmsis -Ideps/sam0/include -Ideps/sam0/cmsis/samd21/include -Ideps/sam0/cmsis/samd21/source   -c -o deps/usb/class/dfu/dfu.o deps/usb/class/dfu/dfu.c
arm-none-eabi-gcc -Wall --std=gnu99 -Os -g3 -flto -fdata-sections -ffunction-sections -funsigned-char -funsigned-bitfields -mcpu=cortex-m0plus -mthumb -D __SAMD21G18A__ -I . -D USB_PRODUCT_ID=0x7551 -D USB_VENDOR_ID=0x1209 -D USB_MANUFACTURER_STR='"Great Scott Gadgets"' -D USB_PRODUCT_STR='"LUNA Saturn-V RCM Bootloader"' -D COPYRIGHT_NOTE='"Visit https://githib.com/opendime/DAFU"'  -Ideps/usb -Ideps/sam0/cmsis -Ideps/sam0/include -Ideps/sam0/cmsis/samd21/include -Ideps/sam0/cmsis/samd21/source   -c -o deps/usb/samd/usb_samd.o deps/usb/samd/usb_samd.c
arm-none-eabi-gcc -Wall --std=gnu99 -Os -g3 -flto -fdata-sections -ffunction-sections -funsigned-char -funsigned-bitfields -mcpu=cortex-m0plus -mthumb -D __SAMD21G18A__ -I . -D USB_PRODUCT_ID=0x7551 -D USB_VENDOR_ID=0x1209 -D USB_MANUFACTURER_STR='"Great Scott Gadgets"' -D USB_PRODUCT_STR='"LUNA Saturn-V RCM Bootloader"' -D COPYRIGHT_NOTE='"Visit https://githib.com/opendime/DAFU"'  -Ideps/usb -Ideps/sam0/cmsis -Ideps/sam0/include -Ideps/sam0/cmsis/samd21/include -Ideps/sam0/cmsis/samd21/source   -c -o deps/usb/usb_requests.o deps/usb/usb_requests.c
arm-none-eabi-gcc -Wall --std=gnu99 -Os -g3 -flto -fdata-sections -ffunction-sections -funsigned-char -funsigned-bitfields -mcpu=cortex-m0plus -mthumb -D __SAMD21G18A__ -I . -D USB_PRODUCT_ID=0x7551 -D USB_VENDOR_ID=0x1209 -D USB_MANUFACTURER_STR='"Great Scott Gadgets"' -D USB_PRODUCT_STR='"LUNA Saturn-V RCM Bootloader"' -D COPYRIGHT_NOTE='"Visit https://githib.com/opendime/DAFU"'  -Ideps/usb -Ideps/sam0/cmsis -Ideps/sam0/include -Ideps/sam0/cmsis/samd21/include -Ideps/sam0/cmsis/samd21/source -o bootloader.elf -flto -Wl,--gc-sections --specs=nano.specs -Wl,-Tlink-script.ld common/startup_samd21.o main.o usb.o common/clock.o deps/usb/class/dfu/dfu.o deps/usb/samd/usb_samd.o deps/usb/usb_requests.o
/usr/lib/gcc/arm-none-eabi/10.2.0/../../../../arm-none-eabi/bin/ld: usb.o (symbol from plugin): in function `usb_cb_reset':
(.text+0x0): multiple definition of `USB_dtype'; main.o (symbol from plugin):(.text+0x0): first defined here
/usr/lib/gcc/arm-none-eabi/10.2.0/../../../../arm-none-eabi/bin/ld: deps/usb/class/dfu/dfu.o (symbol from plugin): in function `dfu_block_offset':
(.text+0x0): multiple definition of `USB_dtype'; main.o (symbol from plugin):(.text+0x0): first defined here
/usr/lib/gcc/arm-none-eabi/10.2.0/../../../../arm-none-eabi/bin/ld: deps/usb/samd/usb_samd.o (symbol from plugin): in function `usb_reset':
(.text+0x0): multiple definition of `USB_dtype'; main.o (symbol from plugin):(.text+0x0): first defined here
/usr/lib/gcc/arm-none-eabi/10.2.0/../../../../arm-none-eabi/bin/ld: deps/usb/usb_requests.o (symbol from plugin): in function `usb_setup':
(.text+0x0): multiple definition of `USB_dtype'; main.o (symbol from plugin):(.text+0x0): first defined here
collect2: error: ld returned 1 exit status
make: *** [Makefile:81: bootloader.elf] Error 1

SuperSpeed: Design Endpoint Interface

Design an endpoint interface (record?) that will serve as an interface between the Device Abstraction and Endpoint Interface Modules.

SuperSpeed: Handle Link Management Packets

Implement hardware to handle receiving and to generate link management packets, where appropriate.

Implement power management (e.g. switching to U2 and back).

SuperSpeed: Implement Recieve Frontend

Implement a transmitter frontend that prepares data to be transmitted to the PHY:

Handle:

• Receive data descrambling.
• Word alignment (based on COM detection).
• SKP removal / elastic buffer handling.

Analyzer: Add Status Flags

Add a set of status flags capturing any information carried from the PHY, including RxError status.

ILA sampling does not work with multiple input signals.

Way to reproduce:
Trying to sample two counters with different reset values leads to unexpected results.

my_counter = Signal(16, reset=0x300)
my_counter2 = Signal(16, reset=0x200)

m.d.sync += my_counter.eq(my_counter + 1)
m.d.sync += my_counter2.eq(my_counter2 + 1)

self.ila  = SyncSerialILA(signals=[my_counter, my_counter2], sample_depth=20)
m.d.comb += self.ila.trigger.eq(my_counter2 == 0x220)

The code above resulting in the following VCD output:

It seems that only my_counter counter samples are present in the recording (twice).
Switching the order of the counters in the list (SyncSerialILA(signals=[my_counter2, my_counter], sample_depth=20)) produces the exact mirror of the previous state. Resulting in the samples of my_counter2 being present twice.

On the other hand, concatenating both counters into a single signal results in the proper samples.

double = Signal(32)
m.d.comb += double.eq(Cat(my_counter, my_counter2))

self.ila  = SyncSerialILA(signals=[double], sample_depth=20)
m.d.comb += self.ila.trigger.eq(my_counter2 == 0x220)

SuperSpeed: Implement Header Packet Tx / Management

Implement a set of modules that handle:

• Sequence management.
• Buffer management / flow control.
• CRC16 Generator
• CRC5 Generator

gateware: spi command interface doesn't properly abort if CS is de-asserted early

03:05:43 <Greg> I think I've found something suspect.
03:05:43 <Greg> Notice the stray pulse on the right side, at the falling edge of CLK.
03:05:43 <Greg> https://cdn.discordapp.com/attachments/686152854704226321/688674277205344266/Screenshot_2020-03-15_19-34-37.png
03:06:36 <Greg> But CS is still IDLE, so we shouldn't be in a state where this is possible. :/
03:08:01 <Greg> I'm only outputing sample_edge if we are inside state: RECEIVE_COMMAND so somehow the SPI controller has moved into RECEIVE_COMMAND.
03:08:26 <Greg> Doh, sorry, CS IS low,
03:08:34 <ktemkin> yeah; but the bit count should be cleared once CS goes high
03:08:50 <Greg> But when it goes HIGH the statemachine doesn't jump back to STALL.
03:09:06 <ktemkin> (to IDLE, but yeah)
03:09:07 <ktemkin> you're right
03:09:36 <Greg> None of the states have a path back to IDLE that depend on the value of CS...
03:10:34 <ktemkin> mhm -- the original r0.1 prototypes didn't have a proper CS line for that bus; so I was counting on reset ensuring that everything was synchronized
03:11:02 <ktemkin> later I decided that was stupid and multiplexed CS over another line
03:11:35 <Greg> One fix, add checks in the statemachine that return to IDLE if CS goes IDLE.
03:12:08 <Greg> Another fix: Ensure that debug controller drives CS HIGH before CLK goes LOW?
03:12:48 <ktemkin> the first one is definitely right
03:12:52 <ktemkin> the second is probably helpful

Note CS is on a PinsN input, so the discussion above is w.r.t. the physical signal and not the nMigen value.

SuperSpeed: Implement Link Training

Implement modules to handle link training:

• Training Set generators.
• Training Set parsers.
• Implement LFPS Transmitters.
• Implement LFPS Receivers.
• Implement the Link Training and Status State Machine (LTSSM).

design an r0.3

Some potential changes for r0.3:

• Re-spec 3V3 regulator to reduce ripple; or at the least, remove its bypass capacitor.
• Improve grounding / thermal connections for the USB PHYs.
• Potentially switch between the active-high and active-low versions of our load switches / switch the load configuration to reduce leakage.
• Replace the USB PHY pull-up resistors with pull-down ones.
• Replace the 60MHz oscillator with the cheaper / lower-jitter SIT1602BC-73-33E-60.000000E.
• Re-evaluate availability and see if switching the 1V1 regulator to its larger package (EF vs EE) makes sense.
• Clean up redundant input caps (C6, C40, C47) on 3V3 regulator (U3).
• Remove redundant C45.
• Change R17, R19, R21 to 5%.
• Add TC2030-NL footprint for SWD.
• Improve pin 1 marking of oscillator Y1 footprint.
• Add "Substitution" BOM field ("any equivalent" for most passives).
• Select LED components and matching series resistors.
• Move LED silkscreen labels closer to LEDs.
• Connect PROGRAM_N to a nearby 3V3 FPGA I/O to allow for easier Debug Controller-less operation.
• Potentially swap the SAMD21 with a SAMD11, for cost reduction.
• Potentially move to USB-C connectors, instead of microUSB.

Incorrect bInterfaceProtocol value for ACM Serial

I tried the ACMSerial example on my TinyFPGA.
I'm using a Mac.
Lsusb shows the USB device, but the MacOS kernel
neglects to mount it as an ACM device.

I found that Luna sets the bInterfaceProtocol to 2.
https://github.com/greatscottgadgets/luna/blob/master/luna/gateware/usb/devices/acm.py#L107

TinyFPGA USB-Serial core which successfully mounts on MacOS sets
that value to 0.
https://github.com/davidthings/tinyfpga_bx_usbserial/blob/master/usb/usb_serial_ctrl_ep.v#L371

According the the 1999 ACD CDC USB specification
Section 4.4 page 30,, 0x02 is not implemented and 0x00 is the correct value.

The ACM example still works on Linux since the Linux ACM driver
is more forgiving. But this is still an issue none the less.

I can open a pull request to fix this.

SyncSerialILA domain selection doesn't work

SyncSerialILA.__init__ extracts the domain argument and then resets it to sync before instantiating an IntegratedLogicAnalyzer (with the intention of wrapping it in DomainRenamer?), but the DomainRenamer is in IntegratedLogicAnalyzer itself so it never ends up in the correct domain.

For now I've deleted line 315 (that was resetting the domain arg to sync) and that seems to work well, but I wasn't sure whether that was the right fix.

luna/luna/gateware/debug/ila.py

Lines 311 to 315 in d9c0a41

	# Extract the domain from our keyword arguments, and then translate it to syn
	# before we pass it back below. We'll use a DomainRenamer at the boundary to
	# handle non-sync domains.
	self.domain = kwargs.get('domain', 'sync')
	kwargs['domain'] = 'sync'

SuperSpeed: Implement Device State Handling

Implement functionality that handles:

• High-level device power state tracking / connectivity tracking.
• ITP-based time tracking.
• Collection and routing for endpoint interfaces.

SuperSpeed: Implement Isochronous Timestamp Packet Interfaces

Implement modules responsible for ITP detection.

Analyzer: Implement (PS)RAM buffering

Currently, the analyzer uses block ram for buffering, which leads it to overrun very, very quickly. We should instead buffer the data in (PS)RAM, so we can have a good buffer depth.

allow using a LUNA_PLATFORM environment variable to ease using external platforms

A variable like LUNA_PLATFORM should allow easy loading of external platforms. This will allow especially minor mods to the existing hardware.

Wrong footprint for R3 resistor

R3 assigned a footprint of a capacitor.

viewsb link broken in readme.md

There is a > character in the readme for the link to viewsb

[ViewSB](https://github.com/usb-tools/viewsb>) 

Rose/Fell still not being DomainRenamed correctly? (SyncSerialILA not working reliably in other domains)

I've been trying to use the SyncSerialILA in non-sync domains and have been having issues with it either returning all zeroes, or random garbage. I can reliably reproduce that by modifying the basic_ila_fast_domain example to run in the usb domain.

I tried setting up the SyncSerialILA's SPI interface to output a fixed word to exclude any issues with the ILA itself and I was still getting zeros out. I eventually narrowed it down to no edges occuring on the SPIDeviceInterface's output_edge (by routing that out to one of the user IOs and watching it on the scope while apollo did the download).

If I modify the Rose/Fell calls in spi_edge_detectors to use domain="usb" then everything seems to work correctly. This was supposed to be fixed by #30 but maybe there's some other corner case happening here? I don't know how to inspect the nMigen elaboration process well enough to debug that further.

(Also here's the IRC discussion that led to the PR above: https://freenode.irclog.whitequark.org/nmigen/2020-07-12#27492949;)

nmigen super powers

with your amazing nmigen super powers....

Can we get a gateware usb connection, so no phy just 3 pins , D9(+|-) and pullup , to run on any nmigen board?

for reference

https://github.com/lambdaconcept/lambdaUSB

could not get it quite running.

--dry-run no longer runs with no board attached

Traceback (most recent call last):
  File "./interactive-test.py", line 368, in <module>
    tester = top_level_cli(InteractiveSelftest)
  File "/Users/ktemkin/Projects/luna/luna/__init__.py", line 42, in top_level_cli
    platform = get_appropriate_platform()
  File "/Users/ktemkin/Projects/luna/luna/gateware/platform/__init__.py", line 26, in get_appropriate_platform
    version = apollo.ApolloDebugger.detect_connected_version()
  File "/Users/ktemkin/Projects/luna/luna/apollo/__init__.py", line 52, in detect_connected_version
    raise DebuggerNotFound()

This violates one of the points of --dry-run.

ILA output incorrect if bits_per_word is not a power of 2

If I setup a SyncSerialILA with signals such that bits_per_word is calculated to be something that isn't a power of 2 (eg: 96, 160, 192, etc.), then the output VCD ends up all wrong. I haven't been able to spot a pattern in what's going wrong yet, or narrow it down in the code.

To reproduce, edit examples/debugging/basic_ila.py to set the counter size to 65 and observe that the VCD is odd:

set the counter size to 64 and all is good:

Minor formatting issue in bringup guide

Usage of Markdown in rst file not going to work :-) -- https://luna.readthedocs.io/en/latest/hardware/bringup_guide.html

Add examples to readthedocs output

It would be awesome to have the examples listed in the LUNA readthedocs documentation -- even if it is just a table with a short description and a link to the directory in github.

Regression in SPI flash comms

A gateware change in the recent past seems to have broken the ability to communicate with the MSPI flash.

Reproduction:

$ luna-dev flash-scan
No compatible gateware detected. Generating and uploading a flash-bridge gateware...
Traceback (most recent call last):
  File "/usr/local/bin/luna-dev", line 11, in <module>
    load_entry_point('LUNA', 'console_scripts', 'luna-dev')()
  File "/Users/ktemkin/Projects/luna/luna/commands/luna_dev.py", line 213, in main
    command(device, log_function, log_error, args)
  File "/Users/ktemkin/Projects/luna/luna/commands/luna_dev.py", line 122, in print_flash_info
    ensure_flash_gateware_loaded(device, log_function=log_function)
  File "/Users/ktemkin/Projects/luna/luna/apollo/flash.py", line 277, in ensure_flash_gateware_loaded
    assert(info is not None)
AssertionError

Inconsistancy between the footprint and the part name in U4

U4 footprint is SOT-553 which corresponds to part number TCR2EE11
U4 part number is TCR2EF11 which corresponds to SOT-753 footprint.

Analyzer: Add Packet Timestamps

Add packet timestamps to each captured analyzer packet -- possibly as a delta from a analyzer start or from the last handled SOF.

SuperSpeed: Implement Header Packet Rx / Management

Implement a set of modules that handle:

• Sequence management.
• Buffer management / flow control.
• CRC16 Checking
• CRC5 Checking

Implement automatic header packet credit expiration.

The current implementation (as scaffolding) assumes that LCRD packets are never missed; which can lead to lost buffers. Implement the specification-mandated timeout to expire stale buffer reservations.

SuperSpeed: Implement Link Command Packets

Implement generators for:

• Packet ACK / flow control commands.
• Power Management Commands
• Link state (up/down) Commands

Implement receivers for:

• Packet ACK / flow control commands.
• Power Management Commands
• Link state (up/down) Commands

Building eptri demo fails

When I tried to build the eptri demo I got bunch of missing type errors - error: unknown type name 'uint8_t'

adding #include <stdint.h> to eptri_example.c solves the above, but still i get bunch of implicit declarations warnings:

make                                                                                                                                                  
riscv64-unknown-elf-gcc -march=rv32i -mabi=ilp32 -g -Os -Wall -Werror -Tsoc.ld -Triscv_standalone.ld  -nostdlib start.S eptri_example.c -o eptri_example.elf
eptri_example.c: In function 'print_char':
eptri_example.c:119:9: error: implicit declaration of function 'uart_tx_rdy_read' [-Werror=implicit-function-declaration]
  while(!uart_tx_rdy_read());
         ^~~~~~~~~~~~~~~~
eptri_example.c:120:2: error: implicit declaration of function 'uart_tx_data_write' [-Werror=implicit-function-declaration]
  uart_tx_data_write(c);
  ^~~~~~~~~~~~~~~~~~
eptri_example.c: In function 'read_setup_request':
eptri_example.c:167:10: error: implicit declaration of function 'setup_have_read' [-Werror=implicit-function-declaration]
   while(!setup_have_read());
          ^~~~~~~~~~~~~~~
eptri_example.c:170:18: error: implicit declaration of function 'setup_data_read' [-Werror=implicit-function-declaration]
   uint8_t byte = setup_data_read();
^~~~~~~~~~~~~~~
eptri_example.c: In function 'send_packet':                                           
eptri_example.c:187:2: error: implicit declaration of function 'in_ep_reset_write' [-Werror=implicit-function-declaration]
  in_ep_reset_write(1);
  ^~~~~~~~~~~~~~~~~
eptri_example.c:191:3: error: implicit declaration of function 'in_ep_data_write' [-Werror=implicit-function-declaration]
   in_ep_data_write(*buffer);
   ^~~~~~~~~~~~~~~~ 
( ... )

disabling -Werror ends up in undefined reference linker errors. Looks like some code is missing here (or is not generated before the example is built)

usb3343 pin matching

Please check pin for USB D+ and D-
Does it work?