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aes

Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.

aes_sbox_gf-2-4-2_composite_field

This is an AES S-Box implementation in verilog , the inverse has been calculated in GF(2^4) field. The irreducible polynomial used is x^4+x+1 , and tau =1 and mu=9

atv-bilibili-demo

BiliBili Client Demo for Apple TV (tvOS)

carry-less-multilplication

digital-ic_1-course-in-nju-2020-spring

e200_opensource

The Ultra-Low Power RISC Core

fpga_sm4

FPGA implementation of Chinese SM4 encryption algorithm.

gm-standards

中华人民共和国密码行业标准(GM/T)文本

haocat.github.io

img_bed

img bed

ldpc

Exact BP decoder. EG, PG, PEG-ACE, 80211n, 80216e LDPC codes. Many modulation schemes.

ldpc-1

Simulation for a given LDPC matrix.

ldpc_en-decoder

LDPC编码解码matlab代码和Verilog代码及资料

ldpc_is

learing-for-advanced-expriment-course-in-nju-2019-fall-

repository for Advanced Expriment Course Ⅱ in NJU

lede

Lean's OpenWrt source

legv8

A simple implementation about LEGv8 instruction set using Verilog HDL.

lk2nd

Custom bootloader for Qualcomm MSM8916/MSM8226/MSM8974/... devices

matcal-course-in-nju-2020-spring

modexpowering3

a 2048 bit RSA verilog project basing on Montgomery , Karatsuba multiplier

numericalmethod-course-in-nju-2020-spring-

This is a git for NumericalMethod-Course

openwrt-ci

OpenWrt CI 在线集成自动编译环境

openwrt-modify

简单的脚本用于修改openwrt镜像

preserve-cd

Game Preservation Project

rsa4096

4096bit RSA project, with verilog code, python test code, etc

rsa4096_new

sm3_core

sm3_highp

A implement of Chinese SHA(SM3) on FPGA from SHU ACTION team

trapping-sets-enumeration

Enumerating of Trapping sets in QC-LDPC codes