- This is a simple CPU implements risc-v 32i.
- It is just my refine product and notes of FemtoRV learning.
- Use on your own risk.
-
CPU Design
- Multi-cycled CPU
- Memory-Mapped IO (partial)
-
Boot Sequential
- Hard-coded boot code (in bram).
- Copy program from flash to spram.
- Jump to spram and execute.