Part of the RISC-V processor in VHDL. Built in 2021.
Lab_Assign.vhd is the main file. Commands should be put in imem.vhd
Do not use the multiplication, division and remainder function. They are not done yet.
ALU_ADD ALU_SLL ALU_SLT ALU_SLTU ALU_XOR ALU_OR ALU_AND ALU_SRA ALU_SRL ALU_SLL ALU_SLT ALU_SLTU ALU_XOR ALU_SRA ALU_SRL ALU_OR ALU_AND
JAL JALR
LUI LOAD STORE
AUIPC