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LiteX coding style guideline?

Looking at typical cosmetic changes @enjoy-digital makes on top of my commits I'm wondering if there is a description of the LiteX/Migen coding style or one should be written. I normally use PEP8 style and typical differences are:

  • alignment of right-hand-side of multiple assignments
  • If/Elif/Else/fsm etc indentation
  • line spacing (like 1 line before class/function definition instead of 2)
  • ClockSignal() has default cd="sys" - should it always be ClockSignal("sys") nevertheless?
    In addition there seems to be a rule about quotes - double instead of single ?
    Anything else I forgot?

I can of course configure my IDE for this style and follow it, but rules need to be known for this.

Merge different approaches to generate devicetree (Linux-on-LiteX-Vexriscv and litex-devicetree)

It would be good for LiteX to generate suitable device tree for Linux / Zephyr (potentially micropython in future).

I started (but never finished) a tool to take a csr.cvs file and generate a Linux Device Tree file - see https://github.com/mithro/litex-devicetree

It was targeting producing suitable dts for or1k as part of the LCA2018 Miniconf tutorial (see https://github.com/timvideos/litex-buildenv/wiki/HowTo-LCA2018-FPGA-Miniconf). It seems to be used here;

https://github.com/timvideos/litex-buildenv/blob/005f7463bd5e022ee3e3d8cc90efde57e8465b86/scripts/build-linux.sh#L97-L131

A much better solution would be to allow modules to provide devicetree fragments in the same way that they can provide CSRs and stuff.

Add support for non-vexriscv CPUs to Linux-on-LiteX-Vexriscv and rename to Linux-on-LiteX?

It would be really cool to transform this repository from linux-on-litex-vexriscv to linux-on-litex by supporting non-vexriscv CPUs.

It should be pretty trivial to support the mor1kx (as Linux on LiteX was originally develop for that CPU).

The possible future CPUs that might make some sense to support are;

  • rocket - This was added by @gsomlo to LiteX recently and rocket has been a target for RISC-V Linux for a long time. This should hopefully be easy and would test things for 64bit?
  • power - microwatt or other power processor would need to be added to LiteX first.
  • sh2 / sh4 - j-core or other SH processor would need to be added to LiteX first.

It would allow better comparison on things like;

  • If the ISA has an effect (riscv vs power vs or1k)
  • How 64bit verse 32bit (vexriscv vs rocket)
  • The implementation (vexriscv vs rocket)
  • etc...

Boot linux from SD Card via SPI (attached to GPIO)

I have (first code I've written in many, many years) coded a FAT16 reader for the secondary SD Card attached via SPI, using the GPIO pins on the de10nano as part of the MiSTer system that I own.

The code can be obtained from: https://github.com/rob-ng15/litex-mister

As it is the first coding I've done in many years it may be a bit rough around the edges, and will need tidying up, but as proof of concept it works.

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