[ddr3-sdram] phy_init_done never asserted

[lnls-dig]

[ddr3-sdram] phy_init_done never asserted

[lerwys]

Comment by lerwys
Sunday Nov 10, 2013 at 16:46 GMT

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Simulation was not using 1ps resolution. Even though the problem persists.

Useful links to this problem:

http://forums.xilinx.com/t5/Xilinx-Boards-and-Kits/ML605-MIG-Reference-Design/td-p/135372

http://www.xilinx.com/support/answers/51954.html

http://www.xilinx.com/support/answers/34779.htm

BC4 efficiency:
http://www.xilinx.com/support/answers/42977.html

Interfacing with UI DDR3 core, reading from it, writing from it:
http://www.xilinx.com/support/answers/33698.html

[lerwys]

Comment by lerwys
Sunday Nov 10, 2013 at 16:46 GMT

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Problem fixed by assigning correct clocks and MMCM parameters to the DDR3 controller.