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lerwys avatar lerwys commented on June 7, 2024

Problem: We need to fix the PCIe core for this to work, as hanging the req line will cause the pcie core to generate timeouts.

Possible solution 1 (software only): On receiving an arbitrary number of continous 0xFF's, detect a PCIe timeout. After this, clear the reset the timeout counter and try again.

Possible solution 2 (FPGA firmware) as suggested by @abyszuk: FPGA PCIe core "client" should periodically withdraw the the access request to allow for possible pending PCIe transactions.

Possible solution 3 (FPGA firmware) as suggested by @abyszuk: Give more meaning to the ui_app_gnt line: if arbiter pulls it low while ui_app_req is high, it's a signal that it wants to withdraw the access permission. In response client should deassert the ui_app_req signal as fast as possible.
Of course it could then assert it back again few clock cycles later and wait for permission.

from bpm-gw.

lerwys avatar lerwys commented on June 7, 2024

Fixed long time ago by using AXI protocol and AXI datamover+interconnect

from bpm-gw.

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