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NCTU 2018 Spring Integrated Circuit Design Laboratory

Home Page: http://www.si2lab.org/course/iclab2018spring/

Io 0.52% Verilog 25.56% Coq 61.11% SystemVerilog 11.65% Batchfile 1.15%

ic_lab's Introduction

IC_lab

NCTU 2018 Spring Integrated Circuit Design Laboratory

  • Lab 01: Design: Booth Multiplier
  • Lab 02: Design: Finite State Machine
  • Lab 03: Design: Tower of IC designers
  • Lab 04: Design: ALU
  • Lab 05: Design: Workstation Logging Simulation (WLS)
  • Lab 06: Design: Security Attack
  • Midterm Project: Design: Breadth First Search
  • Lab 07: Design: Cross Domain Clock (CDC)
  • Lab 08: Design: Midpoint Filter (MF)
  • Lab 09: Design: Coffee Maker
  • Lab 10: Verification: Coffee Maker (From Lab09) and formal verification
  • Lab 11: Design: Local Binary Pattern
  • Lab 12: Power Rail Analysis
  • Final Project: Design: Gradient Descent
  • Online Test: Design: 2-Dimensional Convolution

ic_lab's People

Contributors

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