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PCIE 5.0 Graduation project (Verification Team) under supervision of Mentor Graphics

Verilog 63.98% SystemVerilog 34.18% Stata 0.56% Makefile 1.29%

pcie5_phy's Introduction

pcie5_phy

PCIE 5.0 Graduation project (Verification Team)

To run the Environment:

  • navigate to tb/sim
  • run make build to build the environment
  • run make run to run the code

pcie5_phy's People

Contributors

mohamedali25 avatar mennnatullah avatar nadatarek-1 avatar lobnatarek avatar mas1998m avatar ibrahemkhafaga avatar mohammedbadawi avatar mohamed-elesaily avatar mgtm98 avatar mohamr01 avatar nerm-osama avatar

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