muttasohith/100daysofrtl-1

100DaysofRTL: basic logic gates, mux, half and full subtractor, Encoder, D flipflop, 8 bit counter, LFSR, Custom Counter, Mux using case, JK flip flop, T flip flop, positive edge detection, Priority encoder, Barrel shifter, Signed Magnitude adder, Free Running Counter, Mod-m Counter, Edge Detector with Moore, Edge Detector with Mealy

100DaysofRTL

Trying 100 Days of RTL Challenge

Contents

1. day1 - Basic Gates
2. day2 - Mux
3. day3 - Full Subtractor
4. day4 - Encoder
5. day5 - D FlipFlop
6. day6 - 8 bit Counter
7. day7 - Binary to onehot encoder
8. day8 - LFSR
9. day9 - Custom Counter
10. day10 - Mux using case
11. day11 - JK FlipFlop
12. day12 - T FlipFlop
13. day13 - Positive egde detection
14. day14 - Priority encoder
15. day15 - Barrel shifter
16. day16 - Signed Magnitude adder
17. day17 - Free Running Counter
18. day18 - Mod-m Counter
19. day19 - Edge Detector with Moore
20. day20 - Edge Detector with Mealy
21. day21 - 2 to 4 binary decoder
22. day22 - Dual (Rising & Falling) edge detector
23. day23 - alu
24. day24 - Sequence Detector 1101 mealy nonoverlap
25. day25 - Sequence Detector 1101 mealy overlap
26. day26 - Sequence Detector 1101 moore nonoverlap
27. day27 - Sequence Detector 1101 moore overlap
28. day28 - Binary to Gray Converter
29. day29 - Sequential Multiplier
30. day30 - Single port RAM
31. day31 - Up down counter
32. day32 - Parallel in parallel out (PIPO)
33. day33 - Parallel in serial out (PISO)
34. day34 - Serial in parallel out (SIPO)