Comments (2)
Afaik, making this FPU extendable was one of its primary purposes. You should just need to add your formats to the package here. You can designate the amount of exponent and mantissa bits per format. Note that I am not the author though :-) Let me know whether this answers your question and we can close the issue.
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What about e5m2_fnuz? Is there a way to disable infinities and use a special NaN encoding?
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Related Issues (20)
- C/C++ example for float16alt
- Is it possible to do BF16*int8 + int8 using this IP ?
- Is it possible to do BF16*int8 + int8 using this IP ? #103
- DC Synthesis for cvfpu (fpnew) occurs fatal error HOT 4
- [Bug] Incorrect Accumulation of ‘OF’ Flag in fflags After Executing fsqrt.d on Infinity HOT 1
- [BUG] Incorrect Result from 'fdiv' Operation Leading to Negative Infinity Instead of Smallest Negative Number
- [BUG] Incorrect Accumulation of ‘OF’ Flag in fflags After Executing fsqrt.d on Infinity
- [BUG] Unexpected Rounding Behavior During fsqrt.d Execution
- Proposal: allow the FMA addend to be in either `src_fmt_i` or `dst_fmt_i` HOT 5
- NONCOMP clears the result bit for signaling NaNs in "not equal" compare HOT 1
- SQRT operation for FP16ALT only works when all op[n] lanes are assigned to the same input
- Unexpected Result When fsqrt.s Processes Negative Floating-Point Numbers HOT 4
- fdiv incorrectly returns infinity when dividing by NaN HOT 3
- [BUG] Incorrect fflags Set When Using fdiv Instruction to Divide by Infinity
- [BUG] Incorrectly set fflags: An underflow exception is triggered when the computed result is an exact subnormal number.
- Bug report: FSQRT of non-canonical NaN gives valid large floats
- Bug report: fdiv.s taking two NaN may return a valid number and is not always the consequence of a wrong rounding
- Bug report: multifmt slice uses wrong FP width for third operand HOT 3
- Underflow flag not set at subnormal/normal boundary HOT 13
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