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CH32V003 is an ultra-cheap RISC-V MCU with 2KB SRAM, 16KB flash, and up to 18 GPIOs that sells for under $0.10

C 98.08% Assembly 0.64% C++ 0.05% HTML 0.05% Makefile 1.16% Batchfile 0.01%

ch32v003's Introduction

32-bit general-purpose RISC-V MCU-CH32V003

EN | 中文

Overview

CH32V003 series is based on QingKe RISC-V2A core design of industrial-grade general-purpose microcontroller, support 48MHz system main frequency, with wide voltage, 1-wire serial debug interface, low-power consumption, ultra-small package, etc. CH32V003 series built-in a group of DMA controller, a group of 10-bit ADC, a group of op-amp comparators, multiple timers and standard communication interfaces USART, I2C, SPI, etc.

System Block Diagram

frame

Features

  • QingKe 32-bit RISC-V2A processor, supporting 2 levels of interrupt nesting
  • Maximum 48MHz system main frequency
  • 2KB SRAM, 16KB Flash
  • Power supply voltage: 3.3/5V
  • Multiple low-power modes: Sleep, Standby
  • Power on/off reset, programmable voltage detector
  • 1 group of 1-channel general-purpose DMA controller
  • 1 group of op-amp comparator
  • 1 group of 10-bit ADC
  • 1×16-bit advanced-control timer, 1×16-bit general-purpose timer
  • 2 WDOG, 1×32-bit SysTick
  • 1 USART interface, 1 group of I2C interface, 1 group of SPI interface
  • 18 I/O ports, mapping an external interrupt
  • 64-bit chip unique ID
  • 1-wire serial debug interface (SDI)
  • Package: TSSOP20, QFN20, SOP16, SOP8

ch32v003's People

Contributors

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ch32v003's Issues

Update to v2.9 wchlink firmware does not allow further programming.

I was notified to update my programming device, i did so and got the following error message.
Please advice, how to fix it.

------------ Begin flash process of "obj\gps_rec_v0.hex" ------------
20:10:52:656 >> Current project vendor is WCH, debugger is WCH-Link

20:10:52:656 >> Attempt to open link device and upgrade firmware if necessary...
20:10:52:753 >> Link Device is CH32V305. Already the latest version v2.9, no need to upgrade

20:10:52:797 >> Starting to Handle Operations...
20:10:52:858 >> Failed to configure mcu.
Failed to configure mcu. Please refer to "WCH-LinkUserManual.pdf" for more help.

20:10:52:858 >> Starting to Close Link...
20:10:52:858 >> Close Link Success
--------------------------------End ---------------------------------

Moun River Studio "Peripherals" view empty

Moun River Studio "Peripherals" view is empty when I open one of the examples of this repository.

On the contrary if I create a new project I can see/edit all the peripheral's registers.

How can I fix this for the projects in the EVT/EXAM directory?

Documentation errors

wrong POR register values:
On handle_reset
RCC->CFGR0 is 32 not 0 as stated in datasheet!

This means SYSCLK divided by 3 on startup for PLL!

What else is wrong??

IRQ for cpp is not working

We tried to reproduce the IRQ D0 example from the project shown bellow (path: openwch/ch32v003/EVT/EXAM/EXTI/EXTI0).

image

If we use the main file as a .C file the issue is not reproducible. However if we change the file to a .CPP (executing all steps to converting the project from .C to .CPP) we are not able to use the IRQ.

Using the debug tool we reached the following result:

image

Right after pressing the D0 button, we expect the IRQ defined in the .CPP file (this IRQ is the same from exaple EXTI0), but it got stuck at the "EXTI7_0_IRQHandler: 1: j 1b".

NVIC priority setting is not working

Hello, I have the following setup: Systick is running a simple taskcaller, while a control loop is run by a DMA interrupt. The DMA interrupt should always have the higher priority.

main.c:
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);

control.c

void control_init(void){
    NVIC_InitTypeDef NVIC_InitStructure = {0};
    NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel1_IRQn;
    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
    NVIC_Init(&NVIC_InitStructure);
}

systic.c

void taskcaller_init(void) {
    NVIC_InitTypeDef NVIC_InitStructure = {0};
    NVIC_InitStructure.NVIC_IRQChannel = SysTicK_IRQn;
    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
    NVIC_Init(&NVIC_InitStructure);
}

However, the systick is not interrupted by the control.

Can you please advise how to get Systick_IRQ priority lower than the DMA priority?

EDIT: I tryed reversing prioritys (lower=higher, same effect). I'm desperate for advice.

NRST option byte defaults differ from Reference Manual.

The default value of the option bytes (See RM 16.5) seem to have the reset pin enabled by default, the value is 11010111 where bit 3 and 4 are RST_MODE (OB_RST_EN_DT1ms). In the reference manual it is stated that the default value is 11 (OB_RST_NoEN).

MRS bricks LinkE when upgrading firmware.

This applies to MRS as well as the "Utility" program. In either case if Link firmware 2.7 is detected you can do nothing other than upgrade the firmware to 2.8. This seems to happen peacefully.... BUT.... The Link is bricked as a result.

MRS will not recognize the Link and Utility crashes (Windows closes it) as soon as a bricked Link is connected.

This was done in Windows 10 with 2 LinkE and 1 LinkR (?? LinkV ??). Anyone want 3 bricked Links??

ADC calibration is unclear

datasheet says

2023-10-07_160506_Pa

does this mean offset is internally stored for each channel?
Or offset is stored in RDATAR and I have to apply it manualy? Is it signed then to have negative offset,
but there is only one RDATAR, not one for each channel.

Systick Description Lacking in Datasheet

Hello,
the datasheet is lacking the register description of the Systick. Can you please add a register description to the reference manual?
Thank you,
Michael

slow OpenOCD verification

Verification takes 15seconds,
programming takes <1seconds

"D:\Progs\MounRiver_Studio\toolchain\OpenOCD\bin\openocd.exe" -f "D:\Progs\MounRiver_Studio\toolchain\OpenOCD\bin\wch-riscv.cfg" -c "program proj.elf verify; reset; shutdown;"

Open On-Chip Debugger 0.11.0+dev-02415-gfad123a16-dirty (2023-07-03-15:11)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'sdi'
Warn : Transport "sdi" was already selected
Ready for Remote Connections
Info : WCH-LinkE  mode:RV version 2.10
Info : wlink_init ok
Info : clock speed 6000 kHz
Info : [wch_riscv.cpu.0] datacount=2 progbufsize=8
Info : [wch_riscv.cpu.0] Examined RISC-V core; found 1 harts
Info : [wch_riscv.cpu.0]  XLEN=32, misa=0x40800014
[wch_riscv.cpu.0] Target successfully examined.
Info : starting gdb server for wch_riscv.cpu.0 on 3333
Info : Listening on port 3333 for gdb connections
** Programming Started **
Info : device id = 0xfd62abcd
** Programming Finished **
** Verify Started **
** Verified OK **
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections

without verify; it finishes in <1seconds

why is Verification so slow? Please make it fast as programming.

version: Open On-Chip Debugger 0.11.0+dev-02415-gfad123a16-dirty (2023-07-03-15:11)

SOP16 has broken SPI implementation (no PC5/SCK broken-out pin)

I am looking at the SOP16 variation of the ch32v003. It says everywhere that it supports SPI. Although I see both the MISO and MOSI lines, the SCK pin is not broken out in this package (PC5). Has anyone used this package / know what's up with that and how one can use SPI without SCK? Both in the smaller as well as the larger datasheet it seems it is not configurable to a different port.
Help appreciated!
image
image

TIM2 has 4 compare output pins ?

it looks like the capture/compare channel 1 of TIM2 is marked TIM2CH1ETR ; does this mean that :

  • in input mode, the pin is capture input of TIM2CH1 , and ETR input of TIM2
  • in output mode, the pin is compare output of TIM2CH1 ?
    (important for me is output mode, because I need 8 pwm, outputs, witch was not possible with stm8s003)
    thanks !

No firmware for Micropython for this ch32v003.

Running and flashing this microcontroller board with MicroPython requires firmware associated with this part number CH32V003. Unfortunately, [https://micropython.org/download/] or [https://github.com/micropython/micropython?tab=readme-ov-file#supported-platforms--architectures] does not have firmware for this Microcontroller.

WLink driver for Linux

I cannot get the Linux driver for the W-LinkE to work correctly on Ubuntu 23.04

If I set the ModeS to Serial (red LED) It seems to be OK - /dev/ttyACM0 appears..
BUT if I set it to Flash mode (blue LED) nothing happens - no /dev/ch3?? device appears

To check the hardware I tried it on Windows 10 and it seemed to work OK - both of the LEDs come on. If I reboot into Linux with both LEDs lit I get many usb enumeration errors and the system reboots.

more details on my hackaday https://hackaday.io/project/191172

any ideas?? - my boss will reject the WCH chips if I can't get them working on Linux.

Example for I2C is not working

The I2C example is not working. The Master always hold the SCL pin low.
I've added external 4K7 pull up resistor to both PC1 and PC2 but it's still the same.

How to start with CH32V003 ?

Hello All,
I bought and soldered the CH32V003 product, however when I plug it onto a USB port nothing happens. I can't see any now device in Windows. On Linux there is nothing in dmesg. Only a blue LED is blinking on the board. How to start the device? Or is it faulty?

LDOTRIM?

What's the benefit of setting LDOTRIM?
It's not clear in manual.
Bigger consumption but more stable run?

function u16 Get_ADC_Val(u8 ch) in ADC Auto_Injection dont work

In ch32v003/tree/main/EVT/EXAM/ADC/Auto_Injection/User/main.c
function u16 Get_ADC_Val(u8 ch) (87 string) doesn't use channel selection

I use realization it function in ch32v003/tree/main/EVT/EXAM/ADC/ADC_DMA/User/main.c
u16 Get_ADC_Val(u8 ch)
{
u16 val;

ADC_RegularChannelConfig(ADC1, ch, 1, ADC_SampleTime_241Cycles);
ADC_SoftwareStartConvCmd(ADC1, ENABLE);

while(!ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC));
val = ADC_GetConversionValue(ADC1);

return val;

}

Using another Debugger like Jlink

Hi guys, i'm got into trouble that i just have Jlink. So i want to programming my chip using this. But i cant find any reference about using Jlink instead of WCH...

How is the flash programmed?

Does CH32V003 the on-chip boot code have the ability to flash the device, or is the only way to flash a new CH32V003 is via SWD? We would like to attach this chip to a larger CPU and allow that larger CPU to update the flash in the CH32V003.

LCKK bit of GPIOx_LCKR defined incorrectly in ch32v00x.h

In the EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h header, the GPIO_LCKK definition is incorrect for CH32V003 hardware. It is defined as being in bit 16, but it is actually in bit 8. Also, it thus follows that LCK8 through LCK15 do not exist.

I propose that the definitions for GPIO_LCK8 through GPIO_LCK15 are removed, and GPIO_LCKK is modified as follows:

#define GPIO_LCKK                               ((uint32_t)0x00000100) /* Lock key */

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