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View Code? Open in Web Editor NEWNotes on the Red Pitaya Open Source Instrument
Home Page: http://pavel-demin.github.io/red-pitaya-notes/
License: MIT License
Notes on the Red Pitaya Open Source Instrument
Home Page: http://pavel-demin.github.io/red-pitaya-notes/
License: MIT License
Is it possible to modify your red-pitaya-notes scripts that build RP image (uname -r returns Linux 4.0.0 Xilinx) by users in order to include "ftdi_sio.ko" module. Or where one can find necessary kernel headers and source files to compile ftdi module directly on RP board?
Thanks for your time and effort,
Dragan
A vendor and platform neutral SDR support library including remote access: https://github.com/pothosware/SoapySDR/wiki
when doing so only 4 files appear on sd card
boot.bin 1,59MB
devicetree.dtb 11,8kB
uEnv.txt 319 bytes
uImage 4,67 MB
total 4gb sd card is said to be only 11,5MB big
how to proceed, please ?
thanks and regards
Werner DK8FT
Hi Pavel,
Just noticed a minor error in the HPSDR transceiver. The receive attenuator has two settings 0dB or -20dB and they seem to be reversed, i.e. choosing 0dB inserts 20dB of attenuation whilst choosing -20dB removes the attenuation.
Other than that it's working surprisingly well.
Mike - G4WNC
I attempted an installation of Debian 8 (32bit) in VirtualBox under Windows 7.
Installation failed at https://github.com/pavel-demin/red-pitaya-notes/blob/gh-pages/etc/debian.seed#L86
because apt-get couldn't locate lib32ncurses5. I then changed that to libncurses5 and installation went fine.
Hi,
I'm trying to modify your dac_player's block design so I can use Digital IO. The memory mapping of your block design seems different from the original red pitaya and I can't find the good memory address to set direction then read or write IO. It seems also that register for DIO aren't mapped in block design, but I might be wrong, I don't have a lot of experience in fpga design.
What should I do to access DIO?
Thank you!
Hello
I am trying to send the output of a dds bloc (generating a 1MHz sine wave) to the DAC (using axis_red_pitaya_dacIP bloc) in Vivado.
I tried a direct connection and I had no output.
Then I tried to insert a width converter and a clock converter between the two blocs, then the dac has an output but it seems erratic (frequency much higher than 1MHz, very noisy, ...).
We set these parameters in the dds compiler :
Regards
Cedric
When doing several time in a row TUNE then the audio from the USB gets lost:
[ 948.420650] input: HID 0ccd:0077 as /devices/soc0/amba/e0002000.usb/ci_hdrc.0/usb1/1-1/1-1:1.3/0003:0CCD:0077.0002/input/input1
[ 948.487235] hid-generic 0003:0CCD:0077.0002: input: USB HID v1.00 Device [HID 0ccd:0077] on usb-ci_hdrc.0-1/input3
[ 1060.287620] usb 1-1: 1:1: usb_set_interface failed (-110)
Hello,
the only thing I was missing was git. No problem to install it, but without ... part of the fun is missing.
Hajo
very very minor, TDATA width is user editable, but the core only supports 64 bits, so it should not be user editable in the GUI.
very minor thing
Hello Pavel,
is there a howoto where I can find how to add this very nice project to my existing SD-card? I think this should be possible... I just have received my red pitaya yesterday and took a look at the card which actually contains the two default applications (and now additional the two sdr transceiver projects brought by you installed yesterday via bazaar). I am working with Linux and I am familar with doing such things manually :) Actually very interesting feature would be to upload prebuild packages via web interface so that you can add apps which are not available via bazaar...
vy73 de
Andreas, DF8OE
Hi Pavel, on your "Embedded SDR Transceiver", would it be possible to configure IN2 and OUT2 as microphone input and headphone/speaker output to get rid of the external sound card?
Really appreciate your work - thanks a lot!
Kind regards,
Robert DC1RDB
I have seen on several occasions that the USB sound get lost and is not to be recovered:
So far i'm not able to perform a reproduction when or what caused it.
It seems to me once yoy have entered this you only get out of this error by reflashing the SD card
root@red-pitaya:~# tail -f /var/log/redpitaya_nginx/debug.log
2016/07/01 18:01:39 [notice] 1596#0: signal 17 (SIGCHLD) received
2016/07/01 18:01:39 [info] 1596#0: waitpid() failed (10: No child processes)
2016/07/01 18:01:47 [notice] 1596#0: signal 17 (SIGCHLD) received
2016/07/01 18:01:47 [info] 1596#0: waitpid() failed (10: No child processes)
2016/07/01 18:01:47 [notice] 1596#0: signal 17 (SIGCHLD) received
2016/07/01 18:01:47 [info] 1596#0: waitpid() failed (10: No child processes)
2016/07/01 18:01:55 [notice] 1596#0: signal 17 (SIGCHLD) received
2016/07/01 18:01:55 [info] 1596#0: waitpid() failed (10: No child processes)
2016/07/01 18:01:55 [notice] 1596#0: signal 17 (SIGCHLD) received
2016/07/01 18:01:55 [info] 1596#0: waitpid() failed (10: No child processes)
2016/07/01 18:02:03 [notice] 1596#0: signal 17 (SIGCHLD) received
2016/07/01 18:02:03 [info] 1596#0: waitpid() failed (10: No child processes)
2016/07/01 18:02:03 [notice] 1596#0: signal 17 (SIGCHLD) received
2016/07/01 18:02:03 [info] 1596#0: waitpid() failed (10: No child processes)
Calling application: start
Loading specific FPGA from: '/opt/redpitaya/www/apps/sdr_transceiver_hpsdr/sdr_transceiver_hpsdr.bit'
Loading application: '/opt/redpitaya/www/apps/sdr_transceiver_hpsdr/controllerhf.so'
Cannot resolve 'ws_set_params_interval' function.
Cannot resolve 'ws_set_signals_interval' function.
Cannot resolve 'ws_get_params_interval' function.
Cannot resolve 'ws_get_signals_interval' function.
Cannot resolve 'ws_set_params' function.
Cannot resolve 'ws_get_params' function.
Cannot resolve 'ws_set_signals' function.
Cannot resolve 'ws_get_signals' function.
Cannot resolve 'ws_set_demo_mode' function.
Cannot resolve 'verify_app_license' function.
Cannot resolve 'ws_gzip' function.
Starting HPSDR transceiver server.
2016/07/01 18:02:07 [notice] 1596#0: signal 17 (SIGCHLD) received
2016/07/01 18:02:07 [info] 1596#0: waitpid() failed (10: No child processes)
Application loaded succesfully!random: nonblocking pool is initialized
Playing raw data 'stdin' : Signed 16 bit Big Endian, Rate 48000 Hz, Stereo
underrun!!! (at least 0.042 ms long)
underrun!!! (at least 0.015 ms long)
underrun!!! (at least 0.015 ms long)
underrun!!! (at least 0.013 ms long)
underrun!!! (at least 0.015 ms long)
underrun!!! (at least 0.013 ms long)
underrun!!! (at least 0.012 ms long)
When setting the TUNE level in the transmit options to 10 we would assume that the output power would be 10% of the maximum output level.
There is no change at all in the output level it is always fulll transmit power.
Dear pavel,
First of all,
I have to thank you for all the hard work made for this framework to work.
I have a problem that might be silly but I really would appreciate your comment,
I am trying to use the example code for blinking led on RP accessing /dev/mem just to confirm it's working and for the case of cfg_test project the RP hangs after loading the cfg_test.bit file generated using make command.
Other projects such packetizer_test or red_pitaya_0_92 it works. For those I do the same, load PL and then run ./blink example.
It might be some missing AXI configuration that is present on the top .tcl files for those projects that cfg_test don't have?
Best,
Hi, when I try to select TX in HDSDR I get a message that TX is not supported. I have the latest version of HDSDR per 16.April.16 and use the ExtIO_RedPitaya_TRX.dll downloaded from the link on your site. I would like to tx with HDSDR
I have tried the pure signal but it doesn't seems to work with the HPSDR transceiver.
The Two tone is generated but the feedback level stays black and also the correcting stays black when starting the autocorrection.
Hallo Pavel,
I have build a transceiver using the Red Pitaya and your software. It works perfect. I'm very happy with it.
My first set up was using the DIO0_P pin for PTT and DIO1_P pin for switching an LNA.
Filter control was manually with a rotary switch.
When the ALEX SPI bus control came available, I build it and it is controlling my filters perfect.
I also build the Alex attenuators (10 and 20dB). Now here I have a problem. When you add Alex to the hardware options in de hardware config of HPSDR the roll down menu of the ATT(enuator) is extended.
You have now first the original 0 dB and -20 dB ( I was using to control the LNA) and new -10 dB, 20 dB, 30 dB, 40 dB and 50dB. The -10 dB, 20dB and 30 dB is controlling the attenuator perfectly but the LNA is switching on when I operate one of the 3 levels. Clicking on the 0 dB switch off the attenuators but LNA is still active. After clicking the first -20 dB also the LNA is switched off. I can not operate the attenuators without switching on the LNA.
I also see when no LNA or attenuator is in the line and I switched on the LNA (0 dB) , the receiver noise level goes 20 dB down.
What is my misunderstanding here and what I'm doing wrong? Is the DIO1_P pin not meant the way I'm using it to control a LNA?
Thanks in advance,
Gert PE0MGB
Hello Pavel,
I am trying to understand your FPGA block diagram and I have some questions.
The other questions I have are Vivado related and I can probably Google them.
I am trying to understand your design decisions because I hope to do something similar with my Zedboard and AD9253 EVM (mainly as a learning exercise)
I know these are not really issues but I can't find any other suitable way of asking you.
Hey Pavel,
Maybe i missed somehow somewhere something, but how can we get audio from the red-pitaya?
eg. on the flex-1500 we have a jack to connect a speaker how can this be achieved on the red-pitaya?
I have been playing around in the weekend with the HPSDR transceiver , great job.
73 de ON3VNA
Johan
Hi Pavel,
I'm doing some work with your WSPR transceiver at the moment and it would be very useful to have a command-line accessed 'Tune' facility for the Transmitter. This would force the transmitter into WSPR transmit mode for say 30 seconds or even an on/off toggle. This would be very useful for setting-up and measuring transmit filters and amplifiers.
Thanks,
Mike - G4WNC
Hello Pavel,
Thanks a lot for your very helpful work !
In your sdr_transceiver
project, you use a Xilinx FIFO generator
core in combination with two custom cores (axi_axis_reader
and axi_axis_fifo
) in order to have a memory mapped access to the data stream:
It looks like this functionality could be implemented with the Xilinx AXI-Stream FIFO
core:
I was wondering if I missed something. Does your combination provide better throughput ?
Best,
Jean
Is there a way to make building the debian environment NOT require root?
Requiring scripts to run as root is scary.
It can also affect the development environment by starting or stopping scripts.
(Also awesome work :D)
Hello Pavel and followers,
I am using Red-Pitaya and it's EXTIO together with HDSDR as a receiver successfully. Now I want to replay the recorded files with HDSDR again using the TX function of HDSDR version 2.70.I follow the explanations on "http://pavel-demin.github.io/red-pitaya-notes/sdr-transceiver/" exactly, but when I want to enable the "SDR TX Support" in the "TX menu" of HDSDR, then I get the error message "Actual DLL does not support TX!
Any idea what is going wrong ?
Klaus
hi,
how can i synthesize redpitaya default fpga code (https://github.com/RedPitaya/RedPitaya/tree/master/FPGA) using your approach?
$ make NAME=red_pitaya all ??
i tried to import the redpitaya project (https://github.com/RedPitaya/RedPitaya) into vivado 2015 but ended up in these errors: http://ideone.com/4WUUsB ...any idea how to fix it?
could you upload a vivado project which fixes these errors?
Dear Pavel
I am trying to send the output of a CIC filter to the DAC you developed for the RedPitaya.
To try this I used a DDS generating a 2MHz sine and a 2 MHz cosine. The output of the DDS is on 32 bits (the cosine on bits 0 to 13, the sinus on bits 16 to 29).
The DDS output is send on an axis_subset_converter in order to keep just the cosine (bits 0 to 15).
Then a CIC compiler. We tuned it with the following parameters:
Output of the CIC are send to an axis_clock converter followed by the DAC.
I attached a screenshot of the project.
The trouble is that we always have +1 Volt as an output.
Do you have an idea of where the problem might come from?
Hello Pavel,
I have build the SD image for ecosystem but I was looking for scpi server without success.
Could you please let me know what are the differences regarding the ecosystem with the RP build process.
https://github.com/RedPitaya/RedPitaya/blob/master/OS/debian/README.md
I will appreciate your answer,
Best.
Hello:
I am trying to adapt a Raspberry Pi Device Tree and make it work on the Red Pitaya. You can see my thread here: http://forum.redpitaya.com/viewtopic.php?f=14&t=1409 ... I am working the issue slowly and trying to do this.
This is the Display: https://www.adafruit.com/product/2097
This is the Device Driver: https://github.com/notro/fbtft
How would I build this on your Debian build for the Red Pitaya?
<<
during the process of converting the IP cores to full Vivado IP Catalog cores I found that at least some AXI IP cores have invalid-meaningless memory range settings the way they are created by the tcl scripts. This does make the "auto assign" address in Vivado IPI to fail. This is minor issue of course, and not relevant for the non-gui build process.
Hi,
could you give a short introduction how to use HamVNA with your SDR app?
I'm using the HPSDR transceiver App from the Bazaar and installed the HamVNA software. The connection works so far but I do not get any meaningful data from the software. I assume the DUT ist connected to OUT 1 and IN 1 for measurements in transmission mode? For testing purpose I've hooked up a small LCR circuit with about 200 kHz resonance frequency which I can measure using the Bode analyzer.
First of all thank you for the excellent support you're providing for the Red Pitaya board. It is very much appreciated.
I've been experimenting with your VNA application and have spotted a couple of minor bugs/suggestions in the Windows control program.
1 - When you attempt to save the configuration or s1p data, the Save As dialog shows the expected file suffix (*.ini or *.s1p) but this isn't automatically added to the file-name when you save it. You have to manually add the suffix. It's not a major issue but it confused me for a while so may confuse others.
2 - If you change the Start/Stop/Points settings then attempt a DUT measurement without re-calibrating, the program hangs. It might be better if it gave a message alerting the user to re-calibrate.
3 - Is it possible to save the Red Pitaya's IP address when saving a configuration?
Once again, thanks for some great software.
Mike - G4WNC
If you build all and then build the image, followed by installing HPSDR version of transeiver then try to start the image / server end by using the web interface, then the hermes code is not started:-
root@red-pitaya:~# ps -ef|grep sdr
root 1639 1625 0 17:28 pts/0 00:00:00 grep sdr
if you go to the app directory and start it by running the start script it all works:-
root@red-pitaya:~# cd /opt/redpitaya/www/apps/
root@red-pitaya:/opt/redpitaya/www/apps# ls
assets error_bazaar_install.html idfile.id index.html scope sdr_transceiver_hpsdr style.css
error_bazaar_access.html error_bazaar_proto.html images info scope+gen spectrum ui
root@red-pitaya:/opt/redpitaya/www/apps# cd sdr_transceiver_hpsdr/
root@red-pitaya:/opt/redpitaya/www/apps/sdr_transceiver_hpsdr# ls
controllerhf.so fpga.conf index.html js sdr_transceiver_hpsdr.bit start.sh
css img info sdr-transceiver-hpsdr src stop.sh
root@red-pitaya:/opt/redpitaya/www/apps/sdr_transceiver_hpsdr# ps -ef|grep sdr
root 1763 1625 0 17:32 pts/0 00:00:00 grep sdr
root@red-pitaya:/opt/redpitaya/www/apps/sdr_transceiver_hpsdr# ./start.sh
-bash: ./start.sh: Permission denied
root@red-pitaya:/opt/redpitaya/www/apps/sdr_transceiver_hpsdr# . ./start.sh
root@red-pitaya:/opt/redpitaya/www/apps/sdr_transceiver_hpsdr# ls -al
total 1892
drwxr-xr-x 7 root root 4096 Apr 27 12:18 .
drwxr-xr-x 10 root root 4096 May 22 17:27 ..
-rwxr-xr-x 1 root root 3616 Apr 27 12:18 controllerhf.so
drwxr-xr-x 2 root root 4096 Jan 1 00:22 css
-rw-r--r-- 1 root root 72 Jan 1 00:22 fpga.conf
drwxr-xr-x 2 root root 4096 Jan 1 00:22 img
-rw-r--r-- 1 root root 3051 Jan 1 00:22 index.html
drwxr-xr-x 2 root root 4096 Apr 27 12:18 info
drwxr-xr-x 2 root root 4096 Jan 1 00:22 js
-rwxr-xr-x 1 root root 698040 Apr 27 12:18 sdr-transceiver-hpsdr
-rw-r--r-- 1 root root 1186312 Apr 27 12:18 sdr_transceiver_hpsdr.bit
drwxr-xr-x 2 root root 4096 Jan 1 00:22 src
-rw-r--r-- 1 root root 260 Jan 1 00:22 start.sh
-rw-r--r-- 1 root root 220 Jan 1 00:22 stop.sh
root@red-pitaya:/opt/redpitaya/www/apps/sdr_transceiver_hpsdr#
is this due to a missing execute permission on the two scripts?
Somehow . ./start.sh seems to bypass this lack of permission?
root@red-pitaya:/opt/redpitaya/www/apps/sdr_transceiver_hpsdr# ps -ef|grep sdr
root 1775 1625 0 17:32 pts/0 00:00:00 /opt/redpitaya/www/apps/sdr_transceiver_hpsdr/sdr-transceiver-hpsdr
root 1870 1625 0 17:36 pts/0 00:00:00 grep sdr
root@red-pitaya:/opt/redpitaya/www/apps/sdr_transceiver_hpsdr#
opening this in IP Packager yields in RED Warning:
[IP_Flow 19-3256] Bus Interface 'S_AXI': The slave AXIMM interface used as a read channel requires port maps to interface signals ARADDR, ARVALID, ARREADY, RDATA, RVALID and RREADY. Found missing port map(s) for: ARADDR.
ARADDR signal is missing, even if not used it should be present as the interface has marked it as "required" signal
Aren't the compilers shipped with the Xilinx SDK good enough?
Hello Pavel,
First of all may I congratulate you for your great work in designing such a brilliant and interesting project for the Red Pitaya.
If I may ask a question, I have the WSPR receiver working really well and it is uploading the spots as it should do.
The problem I have is when I change any of the band settings using WinSCP it stops working. If I then restore it back to default everything works again.
For example if I disable the 18MHz band using // nothing works. If I then remove the // everything works again. .Maybe I am missing something.
The same thing happens when I add a comma to the 21MHz band.
Any help would be greatly appreciated.
Many thanks,
Steve
I've been testing the VNA with a resistive series fixture and also with a Mini-Circuits ZFBDC20-6HP+ directional coupler and the results have been very encouraging. The series fixture in particular works very well.
However, when making measurements it would be helpful to have a more detailed readout. I can think of two options but I'm sure there are others:
1 - A tool-tip box that appears at the mouse pointer with a readout of the exact measurement at the pointer tip.
or
2 - Measurement cursors that can be moved on the display to show precise results.
Thanks,
Mike
Hi, your build is awesome, thanks! Only one issue I encounter. I can't get i2c commands from the API to run. When checking the filesystem on the redpitaya I found out these commands don't exist in the file /opt/include/rp.h
However, on the github of RedPitaya those API commands show up in the rp.h file. Is this headerfile (and related object file) behind?
Pavel,
What is the correct procedure to get those images on the red-pitaya disk ?
73 de ON3VNA
Johan
First of all I want to thank you for this great work, Pavel. I think this application will be very helpful for me in the future. It would be great if one was able to save the data as a textfile to plot the data with another tool later. I think it is not possible at the moment, is it? Thank you in advance for a short answer.
Kind regards,
Sebastian
Just made a little mod you can find it here:
https://github.com/effeerre75/Gnuradio-VOX-PTT
In this way if a signal come in the PTT is keyed (VOX), really handy for digital mode.
Only a little change on the sink block: PTT goes to an int value.
Dear Pavel,
Is it possible to sample the ADC's redpitaya at 50 MHz?
Best regards
Ethernet works fine, but I have hard time understanding steps like where to put wpa_supplicant.conf file and what needs to be in it such that wi-fi behave like client not the server. Right now I have in /boot/wpa_supplicant.conf the following
# Red Pitaya WiFi configuration file
ctrl_interface=/var/run/wpa_supplicant
network={
ssid="myssid"
# proto=RSN
key_mgmt=WPA-PSK
# pairwise=CCMP TKIP
# group=CCMP TKIP
psk="myssidpassword"
}
This setting works fine on the latest RP OS image found at http://redpitaya.com/quick-start/
but there /etc/network/interfaces file looks like
# interfaces(5) file used by ifup(8) and ifdown(8)
# Include files from /etc/network/interfaces.d:
# source-directory /etc/network/interfaces.d
source interfaces.d/eth0
source interfaces.d/wlan0
and interfaces.d/wlan0 is a link to wlan0.ap, which looks like
##############################################
# wlan0: Wireless USB adapter AP config #
##############################################
allow-hotplug wlan0
iface wlan0 inet static
address 192.168.128.1
netmask 255.255.255.0
post-up service hostapd restart
post-up service isc-dhcp-server restart
post-up iptables-restore < /etc/iptables.ipv4.nat
pre-down iptables-restore < /etc/iptables.ipv4.nonat
pre-down service isc-dhcp-server stop
pre-down service hostapd stop
However, there is also a wlan0.client file that looks like
##############################################
# wlan0: Wireless USB adapter client config #
##############################################
allow-hotplug wlan0
iface wlan0 inet dhcp
pre-up service hostapd stop
pre-up service isc-dhcp-server stop
pre-up wpa_supplicant -B -D wext -i wlan0 -c /boot/wpa_supplicant.conf
post-down killall -q wpa_supplicant
udhcpc_opts -t7 -T3
which looks for user's local configuration in /boot/wpa_supplicant.conf.
Which scripts are used to create wlan0.client and to read it? Where do I tell that wlan0 is in client not the server mode?
Thanks for your time and effort
Dragan
Hello
I'm trying to use the example of SDR receiver and SDR#.
I followed the 'getting stared' instructions and when I run SDR#, Red Pitaya doesn't appears in Source list.
I noticed that there is a plugins.xml in sdr# directory. This file seems to list some sharpPlugins.
Should I add an entry for the plugin in that file? If so, how to proceed? I didn't manage to found out.
Thanks in advance.
Cedric
Hi, Pavel.
I set up a Red Pitaya-based Reverse Beacon Network skimmer this weekend, and overall was extremely impressed. For the most part, it worked beautifully.
However, I received a report from another ham saying that my receiver spotted them on 10 m even though they were transmitting on 15 m. They said that the reported kHz was correct, but the MHz was not.
I was able to replicate this today. By calling CQ de K2MFF on 21035 kHz. My skimmer (W2NAF) reported spots on both 21035 and 28035 kHz (see attached screenshot).
Do you know how to resolve this?
Thanks and 73,
Nathaniel, W2NAF
After switching to the WDSP library I could send any PTT signal from STM32F7 to Red Pitaya, but there was no effect. (Have adapted the STM program to your new command number "8" , but no success.)
Best regards, Wolfgang
Hello Pavel,
grateful for your development I suggest a little improvement: manual selection of the input- and output channel. This would mean, that Red Pitaya could work as transceiver and as VNA in the same case.
Best regards, Wolfgang (DH1AKF)
Hi,
Thanks for the SDR receiver project; I'm trying to integrate this as an SDR frontent for some custom code, but I run into some issues with the downsampled data.
The pitaya runs sdr_receiver binary with proper bitstream loaded in the FPGA. I'm getting the samples from the TCP socket, but with some kind of periodic distortion goin on.
Attached are two screenshots of a 5 Mhz carrier received by the pitaya. The receiver is tuned to 5Mhz, and there's a slight offset of about 100Hz between sender and received. The problem is that there's a kind of periodicity in the received wave of 134 samples, as can be seen in the waveform.
Do you have any kind of explanation for what I'm seeing, and any idea how I can solve this?
Thanks,
Hello Pavel,
great work with the Debian build. Can you please tell me if SPI and I2C are enabled in your kernel? If not, how do I enable them.
Regards!
Hi Pavel,
Can you help me understand how change axis_ram_writer for use two buffers.
First buffer from 0x1E000000, second buffer from 0x1E3FFFFF.
I want use trigger for change the buffer.
Yevgeniy.
Dear Pavel
I want to use your source code SDR receiver. I would like to connect after demodulation and filtering the output of the FIR filter to the redpityaya's DAC. The decimation filter reports of CIC and FIR filters are fixed in my configuration and respectively equal to 1000 (for CIC filter) and 2 (for RIF filter).
I would like to use a PLL to sample the DAC at 62.5 kHz. Except that using the IP clocking wizard (on PLL mode), the minimum output frequency is 6 MHz (upper than the desired frequency).
Do you have a solution on this.
Best regards.
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