Comments (3)
I suspect this is because the branch is checking out the latest master branch of verilogAST-cpp and the code base is not up to date (since the CMake logic to checkout a specific commit instead of master was added later). There are two options: (1) update the branch to the latest master by merging corier's master branch into rm-ubuf-master branch (recommended to prevent the branch from growing further out of date), (2) look at the latest commit on rm-ubuf-master, find a commit in the same date range in verilogAST-cpp, change "master" to that commit hash in CMakeLists.txt.in here: https://github.com/rdaly525/coreir/blob/rm-ubuf-master/CMakeLists.txt.in#L10 The hope would be that this branch should work with some older version of verilogAST-cpp.
Whoever is maintaining this branch should consider merging this into master to avoid future integration issues since it seems this branch has lived off the mainline for awhile now.
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@francisxu21 my impression was that GarnetFlow was mostly deprecated in favor of https://github.com/StanfordAHA/aha which should be using the latest CoreIR. is that not the case?
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@francisxu21 my impression was that GarnetFlow was mostly deprecated in favor of https://github.com/StanfordAHA/aha which should be using the latest CoreIR. is that not the case?
It seems like its front end tool, halide-to-hardware still uses this branch. The bash file is like:
#!/bin/bash -e
SOURCE="${BASH_SOURCE[0]}"
REQUIREMENTS=`(dirname ${SOURCE})`/requirements.txt
if [ ! -d "coreir" ]; then
# test of push ability
# build coreir here
#git clone --depth 1 --branch rm-ubuf https://github.com/rdaly525/coreir coreir
git clone --depth 1 --branch rm-ubuf-master https://github.com/rdaly525/coreir coreir
# there is a bug in ABI with regex
# see https://github.com/rdaly525/coreir/issues/737
#cd coreir && \
#git apply /GarnetFlow/patches/coreir_path_cxxopt && \
#cd ..
cd coreir/build && cmake .. && make -j2 && cd ../../
else
echo "Coreir already built"
fi
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Related Issues (20)
- Add module longname C API
- Compilation error on Apple M1 chip HOT 11
- Request for CoreIR compatible with Windows. HOT 1
- InstanceVisitorPass does not allow passing in functors that have access to the class object itself.
- Need to change googletest tag from master to main HOT 2
- google test throws sign conversion warnings
- Add a Custom Name for CoreIR Generator When Generate Verilog HOT 14
- Cannot get two bit types to wire together regardless of direction? HOT 3
- [RFC] Bit Pattern Support in coreir HOT 6
- Regression in inline commonlib mux verilog generation
- Verilog backend can clobber names when generating instance output port wires
- inline_single_instance pass should maintain instance name HOT 1
- Update JSON for Modern C++
- Why is IEEE compliance for CW floating point add/mul set to 0? HOT 2
- verilog ND-array generation should be packed arrays instead of unpacked arrays. HOT 3
- Add Multiply optimization
- segfault when using prototype components. HOT 44
- [feature request] adding prefix to coreir/commonlib/... verilog modules HOT 4
- add_dummy_inputs pass doesn't work with sliced signals
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