The goal of this project is to document registers and functions of the SoC and the board in a VSCode friendly way and to provide bare-bones startup code for tinkering. There are no references to any SDKs or libraries other than the stock GNU Arm Embedded Toolchain. There is no build system other than a simple Makefile. The code is kept as simple, small, and clear as possible.
To get started, have the GNU Arm Embedded Toolchain installed, type make, and load the compiled main.elf or main.bin to the device via JLink or other means. The main program activates an UART (115200 8N1) on pads 44 and 45. A simple CLI provides various functions, including reading the accelerometer, ADC, and USR button; writing itself into flash memory, and configuring the FPGA.
The FPGA designs are included in this project as design files and ready-to-use synthesized bitstreams. By default, make simply includes the bitstream data in the firmware and the main program will configure the FPGA during runtime. If you want to change the design and re-sythesize, install QuickLogic's Symbiflow fork and type make hw.
A simplified (and rather incomplete) overview of the board and its EOS S3 SoC is shown here:
It is very much a work-in-progress. For now, only the most basic definitions are included. I'll be adding information as a learn more about this device. Feel free to send me PRs for the parts you care about.
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