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crypt(3) Standard DES password cracker for Ztex 1.15y FPGA board

Makefile 0.21% Verilog 55.28% SystemVerilog 0.55% Coq 0.30% Shell 0.11% C 43.55%

ztex-descrypt's Introduction

crypt(3) Standard DES password auditing tool for Ztex 1.15y FPGA board.

Includes Verilog code, bitstream and example host software. To operate boards, you have to:

  • compile-in configuration for onboard comparator (salt and hashed passwords);
  • compile-in configurations for onboard candidate password generator;
  • read and understand output in hexadecimal.

Compiles and runs on Linux and Windows. Supports operation of several connected boards (you have to improve host software yourself to distribute candidates among fpgas and boards). Performs at approximately 700 MH/s.

Uses Ztex USB Multi-FPGA board communication framework https://github.com/Apingis/ztex_inouttraffic

Project discontinued 10.2016 in favor of integration with John the Ripper.

"John the Ripper" password cracker Home: http://openwall.com/john Development version: https://github.com/magnumripper/JohnTheRipper

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