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vhdlnerd avatar vhdlnerd commented on May 4, 2024 1

I'll try it out this weekend and give you any feedback.

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stnolting avatar stnolting commented on May 4, 2024

Interesting idea!

Obviously, the hardware flow control signals could be implemented using the GPIO ports and some software overhead. But this overhead might compromise some of the "very high" data throughput.

So having dedicated control signals seems to be a nice solution. I have checked the RTS / CTS specifications and if I got them right
neorv32.uart.RTS_o (output) would indicate the UART's receiver being ready to receive another byte while neorv32.uart.CTS_i (input) would indicate the UART's transmitter is allowed to transmit another byte, correct?

Right now I am not sure about the polarity of these signals, but this isn't really a big deal.

Edit

BTW: Nice work on this project! I had it up and running on a Digilent Nexys A7 board quickly without issues.

Thank you very much! 😉

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vhdlnerd avatar vhdlnerd commented on May 4, 2024

Yes, that is the way I believe it works: CTS is an input and RTS is an output. I think they are high active signals (at least to the TTL level).
Thanks for considering this enhancement.

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stnolting avatar stnolting commented on May 4, 2024

I have added (experimental) RTS/CTS hardware flow control with the last repository update. Since I have no full-scale UART-USB adapter available right now, I could only simulate the flow control so far - but it looks pretty good.

Maybe you can give some feedback if you plan to test the new features. 😉

By the way, RTS and CTS seem to be low-active (they are low-active in the current NEORV32 version).

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vhdlnerd avatar vhdlnerd commented on May 4, 2024

It worked great for me on my Nexys A7 board -- RTS/CTS worked as expected.
I'm now running the UART at 460,800 baud, in the bootloader and app code, with no issues.

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stnolting avatar stnolting commented on May 4, 2024

I'm glad to hear that! 👍

from neorv32.

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