Hello! First of all, thanks for sharing this great project. I'm new to vhdl, t

Thankyou again for fast resp ^^. The sintetize work who: <div class="highlight

Hello, sorry abou delay to test. Nice <a class="user-mention notranslate" data-hov

Hey there! The test-setup (<a href="https://github.com/stnolting/neo

This is interesting! <a target="_blank" rel="noopener noreferrer nof

Follow Detailed Synthesis Report <div class="highlight highlight-source-vhdl notra

<a class="user-mention notranslate" data-hovercard-type="user" data-hovercard-url="/us

Cannot fit on XC6SLX9,about stnolting/neorv32

Comments (10)

Alirio926 commented on May 4, 2024 2

Thankyou again for fast resp ^^.
The sintetize work who:

MEM_INT_IMEM_SIZE           => 4*1024
MEM_INT_DMEM_SIZE           => 4*1024,

from neorv32.

Alirio926 commented on May 4, 2024 1

Hello, sorry abou delay to test.
Nice @umarcor noted.
Follow the new Syntetize detailled Report.
Syntetize report dmem8k + imem8k.txt

On imem.vhd i push the code above to out process. same dmem, it's ok?

-- read data --
  rdata <= mem_b3_rd & mem_b2_rd & mem_b1_rd & mem_b0_rd;

neorv32_imem .vhd.txt

Compiled successfully, at night I will test it on the hardware.

from neorv32.

stnolting commented on May 4, 2024

Hey there!

The test-setup (rtl/templates/processor/neorv32_ProcessorTop_Test.vhd) implements 16kB for the IMEM, 8kB for the DMEM, 4kB for the boot ROM and 256 bytes for the CPU register file. That makes a total memory consumption of ~226 kbit. According to the Spartan-6 LX9 datasheet the FPGA provides 576kbit block RAM - so that should be sufficient 🤔

Seems like more than the available block RAMs are used and ISE tries to provide more memory by using up all distributed RAMs.
Can you post some cut-out of the synthesis/mapping reports? Maybe something like "resource utilization by entitiy" (it has been a while since I have worked with ISE...)? The reports should show which component consumes all the block RAMs.

However, you could try reducing the instruction (IMEM) and data (DMEM) memory sizes to make it fit on your FPGA

Reduce IMEM size (for example to 8*1024 bytes):

neorv32/rtl/templates/processor/neorv32_ProcessorTop_Test.vhd

Line 99 in 4830a5b

    
           MEM_INT_IMEM_SIZE            => 16*1024,     -- size of processor-internal instruction memory in bytes

And/or reduce DMEM size (for example to 4*1024 bytes):

neorv32/rtl/templates/processor/neorv32_ProcessorTop_Test.vhd

Line 102 in 4830a5b

    
           MEM_INT_DMEM_SIZE            => 8*1024,      -- size of processor-internal data memory in bytes

I would start with decreasing DMEM size. Seems like only a few kbits are missing to successfully map the design. Furthermore, most of the example applications do not require 8kB DMEM anyway 😄

⚠️ If you modify the DMEM size you need to adapt the linker script and recompile your software application:

neorv32/sw/common/neorv32.ld

Line 62 in 4830a5b

    
           ram  (rwx) : ORIGIN = 0x80000000, LENGTH = DEFINED(make_bootloader) ? 512 : 8*1024

You can find more information regarding this in the user guide: https://stnolting.github.io/neorv32/ug/#_general_software_framework_setup

Btw, the warnings you mentioned are "normal" and are not critical at all 😉

from neorv32.

stnolting commented on May 4, 2024

This is interesting!

The boot ROM was mapped to two block RAMs, but the IMEM and DMEM were not. Even though they have the same size now (all 4kB). 🤔

There are some things that you could try to make ISE map those memories to block RAM, too:

As I said I have not worked with ISE in years, but I think there was an option to configure a "threshold" that defines the minimum RAM size that will get mapped to block RAM. DMEM and IMEM are built from 4 byte-wide memories each. So each of these byte RAMs is just 1kB big in your current setups. ISE might think this is too small for "wasting" block RAM resources... Maybe you can check out the synthesis HDL options: Synthesis -> Process Properties -> HDL options (copied form here: https://stackoverflow.com/questions/4671203/where-to-force-xilinx-ise-to-use-block-rams).
Alternatively, you could try adding attributes to the VHDL memory sources. For instance, you could try this for rtl/core/neorv32_dmem.vhd (I hope the syntax is correct):

  attribute ram_style of mem_ram_b0_rd : signal is "block"; 
  attribute ram_style of mem_ram_b1_rd : signal is "block"; 
  attribute ram_style of mem_ram_b2_rd : signal is "block"; 
  attribute ram_style of mem_ram_b3_rd : signal is "block";

If all this does not work, there is a problem with ISE identifying the memory VHDL code. We had some discussion about that issue (#35, ..., #101). I still hope to have a generalized description that can be understood by any synthesis tool 😅 Anyway, the final option would be either modifying the memory VHDL source code or using memory IPs generated by ISE.

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Alirio926 commented on May 4, 2024

Tried option one and two, no luck.

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stnolting commented on May 4, 2024

I am sorry top hear that.
Can you post/upload the synthesis report? I am really curious where ISE is failing to map those memories.. 🤔

from neorv32.

Alirio926 commented on May 4, 2024

Follow Detailed Synthesis Report

Release 14.7 - xst P.20131013 (nt64)
Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.
--> Parameter TMPDIR set to xst/projnav.tmp


Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.11 secs
 
--> Parameter xsthdpdir set to xst


Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.12 secs
 
--> Reading design: neorv32_ProcessorTop_Test.prj

TABLE OF CONTENTS
  1) Synthesis Options Summary
  2) HDL Parsing
  3) HDL Elaboration
  4) HDL Synthesis
       4.1) HDL Synthesis Report
  5) Advanced HDL Synthesis
       5.1) Advanced HDL Synthesis Report
  6) Low Level Synthesis
  7) Partition Report
  8) Design Summary
       8.1) Primitive and Black Box Usage
       8.2) Device utilization summary
       8.3) Partition Resource Summary
       8.4) Timing Report
            8.4.1) Clock Information
            8.4.2) Asynchronous Control Signals Information
            8.4.3) Timing Summary
            8.4.4) Timing Details
            8.4.5) Cross Clock Domains Report


=========================================================================
*                      Synthesis Options Summary                        *
=========================================================================
---- Source Parameters
Input File Name                    : "neorv32_ProcessorTop_Test.prj"
Ignore Synthesis Constraint File   : NO

---- Target Parameters
Output File Name                   : "neorv32_ProcessorTop_Test"
Output Format                      : NGC
Target Device                      : xc6slx9-3-tqg144

---- Source Options
Top Module Name                    : neorv32_ProcessorTop_Test
Automatic FSM Extraction           : YES
FSM Encoding Algorithm             : Auto
Safe Implementation                : No
FSM Style                          : LUT
RAM Extraction                     : Yes
RAM Style                          : Block
ROM Extraction                     : Yes
Shift Register Extraction          : YES
ROM Style                          : Auto
Resource Sharing                   : YES
Asynchronous To Synchronous        : NO
Shift Register Minimum Size        : 2
Use DSP Block                      : Auto
Automatic Register Balancing       : No

---- Target Options
LUT Combining                      : Auto
Reduce Control Sets                : Auto
Add IO Buffers                     : YES
Global Maximum Fanout              : 100000
Add Generic Clock Buffer(BUFG)     : 16
Register Duplication               : YES
Optimize Instantiated Primitives   : NO
Use Clock Enable                   : Auto
Use Synchronous Set                : Auto
Use Synchronous Reset              : Auto
Pack IO Registers into IOBs        : Auto
Equivalent register Removal        : YES

---- General Options
Optimization Goal                  : Speed
Optimization Effort                : 1
Power Reduction                    : NO
Keep Hierarchy                     : No
Netlist Hierarchy                  : As_Optimized
RTL Output                         : Yes
Global Optimization                : AllClockNets
Read Cores                         : YES
Write Timing Constraints           : NO
Cross Clock Analysis               : NO
Hierarchy Separator                : /
Bus Delimiter                      : <>
Case Specifier                     : Maintain
Slice Utilization Ratio            : 100
BRAM Utilization Ratio             : 100
DSP48 Utilization Ratio            : 100
Auto BRAM Packing                  : NO
Slice Utilization Ratio Delta      : 5

=========================================================================


=========================================================================
*                          HDL Parsing                                  *
=========================================================================
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_package.vhd" into library neorv32
Parsing package <neorv32_package>.
Parsing package body <neorv32_package>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_fifo.vhd" into library neorv32
Parsing entity <neorv32_fifo>.
Parsing architecture <neorv32_fifo_rtl> of entity <neorv32_fifo>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_cpu_decompressor.vhd" into library neorv32
Parsing entity <neorv32_cpu_decompressor>.
Parsing architecture <neorv32_cpu_decompressor_rtl> of entity <neorv32_cpu_decompressor>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_cpu_cp_shifter.vhd" into library neorv32
Parsing entity <neorv32_cpu_cp_shifter>.
Parsing architecture <neorv32_cpu_cp_shifter_rtl> of entity <neorv32_cpu_cp_shifter>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_cpu_cp_muldiv.vhd" into library neorv32
Parsing entity <neorv32_cpu_cp_muldiv>.
Parsing architecture <neorv32_cpu_cp_muldiv_rtl> of entity <neorv32_cpu_cp_muldiv>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_cpu_cp_fpu.vhd" into library neorv32
Parsing entity <neorv32_cpu_cp_fpu>.
Parsing architecture <neorv32_cpu_cp_fpu_rtl> of entity <neorv32_cpu_cp_fpu>.
Parsing entity <neorv32_cpu_cp_fpu_normalizer>.
Parsing architecture <neorv32_cpu_cp_fpu_normalizer_rtl> of entity <neorv32_cpu_cp_fpu_normalizer>.
Parsing entity <neorv32_cpu_cp_fpu_f2i>.
Parsing architecture <neorv32_cpu_cp_fpu_f2i_rtl> of entity <neorv32_cpu_cp_fpu_f2i>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_cpu_regfile.vhd" into library neorv32
Parsing entity <neorv32_cpu_regfile>.
Parsing architecture <neorv32_cpu_regfile_rtl> of entity <neorv32_cpu_regfile>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_cpu_control.vhd" into library neorv32
Parsing entity <neorv32_cpu_control>.
Parsing architecture <neorv32_cpu_control_rtl> of entity <neorv32_cpu_control>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_cpu_bus.vhd" into library neorv32
Parsing entity <neorv32_cpu_bus>.
Parsing architecture <neorv32_cpu_bus_rtl> of entity <neorv32_cpu_bus>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_cpu_alu.vhd" into library neorv32
Parsing entity <neorv32_cpu_alu>.
Parsing architecture <neorv32_cpu_cpu_rtl> of entity <neorv32_cpu_alu>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_bootloader_image.vhd" into library neorv32
Parsing package <neorv32_bootloader_image>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_application_image.vhd" into library neorv32
Parsing package <neorv32_application_image>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_xirq.vhd" into library neorv32
Parsing entity <neorv32_xirq>.
Parsing architecture <neorv32_xirq_rtl> of entity <neorv32_xirq>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_wishbone.vhd" into library neorv32
Parsing entity <neorv32_wishbone>.
Parsing architecture <neorv32_wishbone_rtl> of entity <neorv32_wishbone>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_wdt.vhd" into library neorv32
Parsing entity <neorv32_wdt>.
Parsing architecture <neorv32_wdt_rtl> of entity <neorv32_wdt>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_uart.vhd" into library neorv32
Parsing entity <neorv32_uart>.
Parsing architecture <neorv32_uart_rtl> of entity <neorv32_uart>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_twi.vhd" into library neorv32
Parsing entity <neorv32_twi>.
Parsing architecture <neorv32_twi_rtl> of entity <neorv32_twi>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_trng.vhd" into library neorv32
Parsing entity <neorv32_trng>.
Parsing architecture <neorv32_trng_rtl> of entity <neorv32_trng>.
Parsing entity <neorv32_trng_ring_osc>.
Parsing architecture <neorv32_trng_ring_osc_rtl> of entity <neorv32_trng_ring_osc>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_sysinfo.vhd" into library neorv32
Parsing entity <neorv32_sysinfo>.
Parsing architecture <neorv32_sysinfo_rtl> of entity <neorv32_sysinfo>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_spi.vhd" into library neorv32
Parsing entity <neorv32_spi>.
Parsing architecture <neorv32_spi_rtl> of entity <neorv32_spi>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_slink.vhd" into library neorv32
Parsing entity <neorv32_slink>.
Parsing architecture <neorv32_slink_rtl> of entity <neorv32_slink>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_pwm.vhd" into library neorv32
Parsing entity <neorv32_pwm>.
Parsing architecture <neorv32_pwm_rtl> of entity <neorv32_pwm>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_neoled.vhd" into library neorv32
Parsing entity <neorv32_neoled>.
Parsing architecture <neorv32_neoled_rtl> of entity <neorv32_neoled>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_mtime.vhd" into library neorv32
Parsing entity <neorv32_mtime>.
Parsing architecture <neorv32_mtime_rtl> of entity <neorv32_mtime>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_imem.vhd" into library neorv32
Parsing entity <neorv32_imem>.
Parsing architecture <neorv32_imem_rtl> of entity <neorv32_imem>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_icache.vhd" into library neorv32
Parsing entity <neorv32_icache>.
Parsing architecture <neorv32_icache_rtl> of entity <neorv32_icache>.
Parsing entity <neorv32_icache_memory>.
Parsing architecture <neorv32_icache_memory_rtl> of entity <neorv32_icache_memory>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_gpio.vhd" into library neorv32
Parsing entity <neorv32_gpio>.
Parsing architecture <neorv32_gpio_rtl> of entity <neorv32_gpio>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_dmem.vhd" into library neorv32
Parsing entity <neorv32_dmem>.
Parsing architecture <neorv32_dmem_rtl> of entity <neorv32_dmem>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_debug_dtm.vhd" into library neorv32
Parsing entity <neorv32_debug_dtm>.
Parsing architecture <neorv32_debug_dtm_rtl> of entity <neorv32_debug_dtm>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_debug_dm.vhd" into library neorv32
Parsing entity <neorv32_debug_dm>.
Parsing architecture <neorv32_debug_dm_rtl> of entity <neorv32_debug_dm>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_cpu.vhd" into library neorv32
Parsing entity <neorv32_cpu>.
Parsing architecture <neorv32_cpu_rtl> of entity <neorv32_cpu>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_cfs.vhd" into library neorv32
Parsing entity <neorv32_cfs>.
Parsing architecture <neorv32_cfs_rtl> of entity <neorv32_cfs>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_bus_keeper.vhd" into library neorv32
Parsing entity <neorv32_bus_keeper>.
Parsing architecture <neorv32_bus_keeper_rtl> of entity <neorv32_bus_keeper>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_busswitch.vhd" into library neorv32
Parsing entity <neorv32_busswitch>.
Parsing architecture <neorv32_busswitch_rtl> of entity <neorv32_busswitch>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_boot_rom.vhd" into library neorv32
Parsing entity <neorv32_boot_rom>.
Parsing architecture <neorv32_boot_rom_rtl> of entity <neorv32_boot_rom>.
Parsing VHDL file "E:\VHDL\neorv32\rtl\core\neorv32_top.vhd" into library neorv32
Parsing entity <neorv32_top>.
Parsing architecture <neorv32_top_rtl> of entity <neorv32_top>.
Parsing VHDL file "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" into library neorv32
Parsing entity <neorv32_ProcessorTop_Test>.
Parsing architecture <neorv32_ProcessorTop_Test_rtl> of entity <neorv32_processortop_test>.

=========================================================================
*                            HDL Elaboration                            *
=========================================================================

Elaborating entity <neorv32_ProcessorTop_Test> (architecture <neorv32_ProcessorTop_Test_rtl>) from library <neorv32>.
WARNING:HDLCompiler:746 - "E:\VHDL\neorv32\rtl\core\neorv32_package.vhd" Line 1002: Range is empty (null range)
WARNING:HDLCompiler:746 - "E:\VHDL\neorv32\rtl\core\neorv32_package.vhd" Line 1012: Range is empty (null range)
WARNING:HDLCompiler:746 - "E:\VHDL\neorv32\rtl\core\neorv32_top.vhd" Line 196: Range is empty (null range)
WARNING:HDLCompiler:746 - "E:\VHDL\neorv32\rtl\core\neorv32_top.vhd" Line 210: Range is empty (null range)

Elaborating entity <neorv32_top> (architecture <neorv32_top_rtl>) with generics from library <neorv32>.
Note: "NEORV32 PROCESSOR IO Configuration: GPIO MTIME UART0 WDT "
Note: "NEORV32 PROCESSOR CONFIG NOTE: Boot configuration: Indirect boot via bootloader (processor-internal BOOTROM)."

Elaborating entity <neorv32_cpu> (architecture <neorv32_cpu_rtl>) with generics from library <neorv32>.
Note: "NEORV32 CPU ISA Configuration (MARCH): RV32IMCU_Zicsr"
Note: "NEORV32 CPU CONFIG NOTE: Implementing NO dedicated hardware reset for uncritical registers (default, might reduce area). Set package constant <dedicated_reset_c> = TRUE to configure a DEFINED reset value for all CPU registers."

Elaborating entity <neorv32_cpu_control> (architecture <neorv32_cpu_control_rtl>) with generics from library <neorv32>.
WARNING:HDLCompiler:746 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_control.vhd" Line 261: Range is empty (null range)
WARNING:HDLCompiler:746 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_control.vhd" Line 262: Range is empty (null range)
INFO:HDLCompiler:679 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_control.vhd" Line 446. Case statement is complete. others clause is never selected

Elaborating entity <neorv32_fifo> (architecture <neorv32_fifo_rtl>) with generics from library <neorv32>.
INFO:HDLCompiler:679 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_control.vhd" Line 580. Case statement is complete. others clause is never selected

Elaborating entity <neorv32_cpu_decompressor> (architecture <neorv32_cpu_decompressor_rtl>) from library <neorv32>.
INFO:HDLCompiler:679 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_decompressor.vhd" Line 348. Case statement is complete. others clause is never selected
INFO:HDLCompiler:679 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_control.vhd" Line 1254. Case statement is complete. others clause is never selected

Elaborating entity <neorv32_cpu_regfile> (architecture <neorv32_cpu_regfile_rtl>) with generics from library <neorv32>.

Elaborating entity <neorv32_cpu_alu> (architecture <neorv32_cpu_cpu_rtl>) with generics from library <neorv32>.
INFO:HDLCompiler:679 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_alu.vhd" Line 205. Case statement is complete. others clause is never selected
INFO:HDLCompiler:679 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_alu.vhd" Line 219. Case statement is complete. others clause is never selected

Elaborating entity <neorv32_cpu_cp_shifter> (architecture <neorv32_cpu_cp_shifter_rtl>) with generics from library <neorv32>.

Elaborating entity <neorv32_cpu_cp_muldiv> (architecture <neorv32_cpu_cp_muldiv_rtl>) with generics from library <neorv32>.

Elaborating entity <neorv32_cpu_bus> (architecture <neorv32_cpu_bus_rtl>) with generics from library <neorv32>.
WARNING:HDLCompiler:746 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_bus.vhd" Line 149: Range is empty (null range)
WARNING:HDLCompiler:746 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_bus.vhd" Line 155: Range is empty (null range)
WARNING:HDLCompiler:746 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_bus.vhd" Line 156: Range is empty (null range)
WARNING:HDLCompiler:746 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_bus.vhd" Line 157: Range is empty (null range)
WARNING:HDLCompiler:746 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_bus.vhd" Line 158: Range is empty (null range)
WARNING:HDLCompiler:746 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_bus.vhd" Line 159: Range is empty (null range)
WARNING:HDLCompiler:746 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_bus.vhd" Line 459: Range is empty (null range)
WARNING:HDLCompiler:746 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_bus.vhd" Line 471: Range is empty (null range)
WARNING:HDLCompiler:746 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_bus.vhd" Line 484: Range is empty (null range)

Elaborating entity <neorv32_busswitch> (architecture <neorv32_busswitch_rtl>) with generics from library <neorv32>.

Elaborating entity <neorv32_bus_keeper> (architecture <neorv32_bus_keeper_rtl>) with generics from library <neorv32>.

Elaborating entity <neorv32_imem> (architecture <neorv32_imem_rtl>) with generics from library <neorv32>.
Note: "NEORV32 PROCESSOR CONFIG NOTE: Implementing processor-internal IMEM as blank RAM (8192 bytes)."

Elaborating entity <neorv32_dmem> (architecture <neorv32_dmem_rtl>) with generics from library <neorv32>.
Note: "NEORV32 PROCESSOR CONFIG NOTE: Implementing processor-internal DMEM (RAM, 8192 bytes)."

Elaborating entity <neorv32_boot_rom> (architecture <neorv32_boot_rom_rtl>) with generics from library <neorv32>.
Note: "NEORV32 PROCESSOR CONFIG NOTE: Implementing internal bootloader ROM (4096 bytes)."

Elaborating entity <neorv32_gpio> (architecture <neorv32_gpio_rtl>) from library <neorv32>.

Elaborating entity <neorv32_wdt> (architecture <neorv32_wdt_rtl>) from library <neorv32>.

Elaborating entity <neorv32_mtime> (architecture <neorv32_mtime_rtl>) from library <neorv32>.

Elaborating entity <neorv32_uart> (architecture <neorv32_uart_rtl>) with generics from library <neorv32>.
WARNING:HDLCompiler:220 - "E:\VHDL\neorv32\rtl\core\neorv32_top.vhd" Line 1186: Assignment ignored

Elaborating entity <neorv32_sysinfo> (architecture <neorv32_sysinfo_rtl>) with generics from library <neorv32>.

=========================================================================
*                           HDL Synthesis                               *
=========================================================================

Synthesizing Unit <neorv32_ProcessorTop_Test>.
    Related source file is "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd".
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <wb_tag_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <wb_adr_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <wb_dat_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <wb_sel_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <slink_tx_dat_o<0>> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <slink_tx_dat_o<1>> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <slink_tx_dat_o<2>> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <slink_tx_dat_o<3>> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <slink_tx_dat_o<4>> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <slink_tx_dat_o<5>> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <slink_tx_dat_o<6>> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <slink_tx_dat_o<7>> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <slink_tx_val_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <slink_rx_rdy_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <spi_csn_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <cfs_out_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <mtime_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <jtag_tdo_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <wb_we_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <wb_stb_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <wb_cyc_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <wb_lock_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <fence_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <fencei_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <uart0_rts_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <uart1_txd_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <uart1_rts_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <spi_sck_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <spi_sdo_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\xilinx\neorv32\neorv32_ProcessorTop_Test.vhd" line 69: Output port <neoled_o> of the instance <neorv32_top_inst> is unconnected or connected to loadless signal.
    Summary:
	no macro.
Unit <neorv32_ProcessorTop_Test> synthesized.

Synthesizing Unit <neorv32_top>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_top.vhd".
        CLOCK_FREQUENCY = 100000000
        USER_CODE = "00000000000000000000000000000000"
        HW_THREAD_ID = 0
        INT_BOOTLOADER_EN = true
        ON_CHIP_DEBUGGER_EN = false
        CPU_EXTENSION_RISCV_A = false
        CPU_EXTENSION_RISCV_C = true
        CPU_EXTENSION_RISCV_E = false
        CPU_EXTENSION_RISCV_M = true
        CPU_EXTENSION_RISCV_U = true
        CPU_EXTENSION_RISCV_Zfinx = false
        CPU_EXTENSION_RISCV_Zicsr = true
        CPU_EXTENSION_RISCV_Zifencei = false
        CPU_EXTENSION_RISCV_Zmmul = false
        FAST_MUL_EN = false
        FAST_SHIFT_EN = false
        CPU_CNT_WIDTH = 64
        CPU_IPB_ENTRIES = 2
        PMP_NUM_REGIONS = 0
        PMP_MIN_GRANULARITY = 65536
        HPM_NUM_CNTS = 4
        HPM_CNT_WIDTH = 40
        MEM_INT_IMEM_EN = true
        MEM_INT_IMEM_SIZE = 8192
        MEM_INT_DMEM_EN = true
        MEM_INT_DMEM_SIZE = 8192
        ICACHE_EN = false
        ICACHE_NUM_BLOCKS = 4
        ICACHE_BLOCK_SIZE = 64
        ICACHE_ASSOCIATIVITY = 1
        MEM_EXT_EN = false
        MEM_EXT_TIMEOUT = 0
        SLINK_NUM_TX = 0
        SLINK_NUM_RX = 0
        SLINK_TX_FIFO = 1
        SLINK_RX_FIFO = 1
        XIRQ_NUM_CH = 0
        XIRQ_TRIGGER_TYPE = "11111111111111111111111111111111"
        XIRQ_TRIGGER_POLARITY = "11111111111111111111111111111111"
        IO_GPIO_EN = true
        IO_MTIME_EN = true
        IO_UART0_EN = true
        IO_UART1_EN = false
        IO_SPI_EN = false
        IO_TWI_EN = false
        IO_PWM_NUM_CH = 0
        IO_WDT_EN = true
        IO_TRNG_EN = false
        IO_CFS_EN = false
        IO_CFS_CONFIG = "00000000000000000000000000000000"
        IO_CFS_IN_SIZE = 32
        IO_CFS_OUT_SIZE = 32
        IO_NEOLED_EN = false
        IO_NEOLED_TX_FIFO = 1
WARNING:Xst:647 - Input <wb_dat_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <slink_tx_rdy_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <slink_rx_dat_i<0>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <slink_rx_dat_i<1>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <slink_rx_dat_i<2>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <slink_rx_dat_i<3>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <slink_rx_dat_i<4>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <slink_rx_dat_i<5>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <slink_rx_dat_i<6>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <slink_rx_dat_i<7>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <slink_rx_val_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <cfs_in_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <mtime_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <jtag_trst_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <jtag_tck_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <jtag_tms_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <wb_ack_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <wb_err_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <uart1_rxd_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <uart1_cts_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <spi_sdi_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <mtime_irq_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
INFO:Xst:3210 - "E:\VHDL\neorv32\rtl\core\neorv32_top.vhd" line 443: Output port <i_bus_priv_o> of the instance <neorv32_cpu_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\neorv32\rtl\core\neorv32_top.vhd" line 443: Output port <d_bus_priv_o> of the instance <neorv32_cpu_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\neorv32\rtl\core\neorv32_top.vhd" line 443: Output port <sleep_o> of the instance <neorv32_cpu_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\neorv32\rtl\core\neorv32_top.vhd" line 443: Output port <i_bus_lock_o> of the instance <neorv32_cpu_inst> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "E:\VHDL\neorv32\rtl\core\neorv32_top.vhd" line 594: Output port <p_bus_lock_o> of the instance <neorv32_busswitch_inst> is unconnected or connected to loadless signal.
WARNING:Xst:2563 - Inout <twi_sda_io> is never assigned. Tied to value Z.
WARNING:Xst:2563 - Inout <twi_scl_io> is never assigned. Tied to value Z.
    Found 12-bit register for signal <clk_div>.
    Found 8-bit register for signal <rstn_gen>.
    Found 1-bit register for signal <sys_rstn>.
    Found 8-bit register for signal <clk_div_ff>.
    Found 8-bit register for signal <clk_gen>.
    Found 1-bit register for signal <mtime_o<31>>.
    Found 1-bit register for signal <mtime_o<30>>.
    Found 1-bit register for signal <mtime_o<29>>.
    Found 1-bit register for signal <mtime_o<28>>.
    Found 1-bit register for signal <mtime_o<27>>.
    Found 1-bit register for signal <mtime_o<26>>.
    Found 1-bit register for signal <mtime_o<25>>.
    Found 1-bit register for signal <mtime_o<24>>.
    Found 1-bit register for signal <mtime_o<23>>.
    Found 1-bit register for signal <mtime_o<22>>.
    Found 1-bit register for signal <mtime_o<21>>.
    Found 1-bit register for signal <mtime_o<20>>.
    Found 1-bit register for signal <mtime_o<19>>.
    Found 1-bit register for signal <mtime_o<18>>.
    Found 1-bit register for signal <mtime_o<17>>.
    Found 1-bit register for signal <mtime_o<16>>.
    Found 1-bit register for signal <mtime_o<15>>.
    Found 1-bit register for signal <mtime_o<14>>.
    Found 1-bit register for signal <mtime_o<13>>.
    Found 1-bit register for signal <mtime_o<12>>.
    Found 1-bit register for signal <mtime_o<11>>.
    Found 1-bit register for signal <mtime_o<10>>.
    Found 1-bit register for signal <mtime_o<9>>.
    Found 1-bit register for signal <mtime_o<8>>.
    Found 1-bit register for signal <mtime_o<7>>.
    Found 1-bit register for signal <mtime_o<6>>.
    Found 1-bit register for signal <mtime_o<5>>.
    Found 1-bit register for signal <mtime_o<4>>.
    Found 1-bit register for signal <mtime_o<3>>.
    Found 1-bit register for signal <mtime_o<2>>.
    Found 1-bit register for signal <mtime_o<1>>.
    Found 1-bit register for signal <mtime_o<0>>.
    Found 2-bit register for signal <clk_gen_en>.
    Found 12-bit adder for signal <clk_div[11]_GND_6_o_add_1_OUT> created at line 1241.
    Found 1-bit tristate buffer for signal <twi_sda_io> created at line 192
    Found 1-bit tristate buffer for signal <twi_scl_io> created at line 193
    WARNING:Xst:2404 -  FFs/Latches <clk_gen_en<7:2>> (without init value) have a constant value of 0 in block <neorv32_top>.
    Summary:
	inferred   1 Adder/Subtractor(s).
	inferred  71 D-type flip-flop(s).
	inferred   2 Tristate(s).
Unit <neorv32_top> synthesized.

Synthesizing Unit <neorv32_cpu>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_cpu.vhd".
        HW_THREAD_ID = 0
        CPU_BOOT_ADDR = "11111111111111110000000000000000"
        CPU_DEBUG_ADDR = "11111111111111111111100000000000"
        CPU_EXTENSION_RISCV_A = false
        CPU_EXTENSION_RISCV_C = true
        CPU_EXTENSION_RISCV_E = false
        CPU_EXTENSION_RISCV_M = true
        CPU_EXTENSION_RISCV_U = true
        CPU_EXTENSION_RISCV_Zfinx = false
        CPU_EXTENSION_RISCV_Zicsr = true
        CPU_EXTENSION_RISCV_Zifencei = false
        CPU_EXTENSION_RISCV_Zmmul = false
        CPU_EXTENSION_RISCV_DEBUG = false
        FAST_MUL_EN = false
        FAST_SHIFT_EN = false
        CPU_CNT_WIDTH = 64
        CPU_IPB_ENTRIES = 2
        PMP_NUM_REGIONS = 0
        PMP_MIN_GRANULARITY = 65536
        HPM_NUM_CNTS = 4
        HPM_CNT_WIDTH = 40
    Summary:
	no macro.
Unit <neorv32_cpu> synthesized.

Synthesizing Unit <neorv32_cpu_control>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_cpu_control.vhd".
        HW_THREAD_ID = 0
        CPU_BOOT_ADDR = "11111111111111110000000000000000"
        CPU_DEBUG_ADDR = "11111111111111111111100000000000"
        CPU_EXTENSION_RISCV_A = false
        CPU_EXTENSION_RISCV_C = true
        CPU_EXTENSION_RISCV_E = false
        CPU_EXTENSION_RISCV_M = true
        CPU_EXTENSION_RISCV_U = true
        CPU_EXTENSION_RISCV_Zfinx = false
        CPU_EXTENSION_RISCV_Zicsr = true
        CPU_EXTENSION_RISCV_Zifencei = false
        CPU_EXTENSION_RISCV_Zmmul = false
        CPU_EXTENSION_RISCV_DEBUG = false
        CPU_CNT_WIDTH = 64
        CPU_IPB_ENTRIES = 2
        PMP_NUM_REGIONS = 0
        PMP_MIN_GRANULARITY = 65536
        HPM_NUM_CNTS = 4
        HPM_CNT_WIDTH = 40
WARNING:Xst:647 - Input <alu_add_i<0:0>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <fpu_flags_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <db_halt_req_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
INFO:Xst:3210 - "E:\VHDL\neorv32\rtl\core\neorv32_cpu_control.vhd" line 460: Output port <level_o> of the instance <instr_prefetch_buffer> is unconnected or connected to loadless signal.
    Found 10-bit register for signal <trap_ctrl_exc_buf>.
    Found 2-bit register for signal <csr_privilege>.
    Found 1-bit register for signal <execute_engine_branched>.
    Found 1-bit register for signal <fetch_engine_restart>.
    Found 4-bit register for signal <execute_engine_state>.
    Found 4-bit register for signal <execute_engine_state_prev>.
    Found 32-bit register for signal <execute_engine_pc>.
    Found 22-bit register for signal <trap_ctrl_irq_ack>.
    Found 2-bit register for signal <csr_mstatus_mpp>.
    Found 32-bit register for signal <csr_mscratch>.
    Found 1-bit register for signal <fetch_engine_state_prev>.
    Found 1-bit register for signal <issue_engine_state>.
    Found 1-bit register for signal <issue_engine_align>.
    Found 1-bit register for signal <execute_engine_is_ci>.
    Found 1-bit register for signal <execute_engine_sleep>.
    Found 1-bit register for signal <trap_ctrl_exc_ack>.
    Found 1-bit register for signal <trap_ctrl_env_start>.
    Found 1-bit register for signal <csr_we>.
    Found 1-bit register for signal <csr_mstatus_mie>.
    Found 1-bit register for signal <csr_mstatus_mpie>.
    Found 1-bit register for signal <csr_mie_msie>.
    Found 1-bit register for signal <csr_mie_meie>.
    Found 1-bit register for signal <csr_mie_mtie>.
    Found 1-bit register for signal <csr_mcounteren_cy>.
    Found 1-bit register for signal <csr_mcounteren_tm>.
    Found 1-bit register for signal <csr_mcounteren_ir>.
    Found 1-bit register for signal <csr_mcountinhibit_cy>.
    Found 1-bit register for signal <csr_mcountinhibit_ir>.
    Found 1-bit register for signal <csr_mcycle_ovfl>.
    Found 1-bit register for signal <csr_minstret_ovfl>.
    Found 1-bit register for signal <csr_mhpmcounter_ovfl<0>>.
    Found 1-bit register for signal <csr_mhpmcounter_ovfl<1>>.
    Found 1-bit register for signal <csr_mhpmcounter_ovfl<2>>.
    Found 1-bit register for signal <csr_mhpmcounter_ovfl<3>>.
    Found 1-bit register for signal <csr_mhpmcounterh<0><7>>.
    Found 1-bit register for signal <csr_mhpmcounterh<0><6>>.
    Found 1-bit register for signal <csr_mhpmcounterh<0><5>>.
    Found 1-bit register for signal <csr_mhpmcounterh<0><4>>.
    Found 1-bit register for signal <csr_mhpmcounterh<0><3>>.
    Found 1-bit register for signal <csr_mhpmcounterh<0><2>>.
    Found 1-bit register for signal <csr_mhpmcounterh<0><1>>.
    Found 1-bit register for signal <csr_mhpmcounterh<0><0>>.
    Found 1-bit register for signal <csr_mhpmcounterh<1><7>>.
    Found 1-bit register for signal <csr_mhpmcounterh<1><6>>.
    Found 1-bit register for signal <csr_mhpmcounterh<1><5>>.
    Found 1-bit register for signal <csr_mhpmcounterh<1><4>>.
    Found 1-bit register for signal <csr_mhpmcounterh<1><3>>.
    Found 1-bit register for signal <csr_mhpmcounterh<1><2>>.
    Found 1-bit register for signal <csr_mhpmcounterh<1><1>>.
    Found 1-bit register for signal <csr_mhpmcounterh<1><0>>.
    Found 1-bit register for signal <csr_mhpmcounterh<2><7>>.
    Found 1-bit register for signal <csr_mhpmcounterh<2><6>>.
    Found 1-bit register for signal <csr_mhpmcounterh<2><5>>.
    Found 1-bit register for signal <csr_mhpmcounterh<2><4>>.
    Found 1-bit register for signal <csr_mhpmcounterh<2><3>>.
    Found 1-bit register for signal <csr_mhpmcounterh<2><2>>.
    Found 1-bit register for signal <csr_mhpmcounterh<2><1>>.
    Found 1-bit register for signal <csr_mhpmcounterh<2><0>>.
    Found 1-bit register for signal <csr_mhpmcounterh<3><7>>.
    Found 1-bit register for signal <csr_mhpmcounterh<3><6>>.
    Found 1-bit register for signal <csr_mhpmcounterh<3><5>>.
    Found 1-bit register for signal <csr_mhpmcounterh<3><4>>.
    Found 1-bit register for signal <csr_mhpmcounterh<3><3>>.
    Found 1-bit register for signal <csr_mhpmcounterh<3><2>>.
    Found 1-bit register for signal <csr_mhpmcounterh<3><1>>.
    Found 1-bit register for signal <csr_mhpmcounterh<3><0>>.
    Found 1-bit register for signal <fetch_engine_state>.
    Found 32-bit register for signal <fetch_engine_pc>.
    Found 18-bit register for signal <issue_engine_buf>.
    Found 32-bit register for signal <imm_o>.
    Found 32-bit register for signal <execute_engine_i_reg>.
    Found 32-bit register for signal <execute_engine_i_reg_last>.
    Found 32-bit register for signal <execute_engine_next_pc>.
    Found 32-bit register for signal <execute_engine_last_pc>.
    Found 7-bit register for signal <trap_ctrl_cause>.
    Found 16-bit register for signal <csr_mie_firqe>.
    Found 4-bit register for signal <csr_mcountinhibit_hpm>.
    Found 32-bit register for signal <csr_mepc>.
    Found 6-bit register for signal <csr_mcause>.
    Found 32-bit register for signal <csr_mtvec>.
    Found 32-bit register for signal <csr_mtval>.
    Found 15-bit register for signal <csr_mhpmevent<0>>.
    Found 15-bit register for signal <csr_mhpmevent<1>>.
    Found 15-bit register for signal <csr_mhpmevent<2>>.
    Found 15-bit register for signal <csr_mhpmevent<3>>.
    Found 32-bit register for signal <csr_mcycle>.
    Found 32-bit register for signal <csr_mcycleh>.
    Found 32-bit register for signal <csr_minstret>.
    Found 32-bit register for signal <csr_minstreth>.
    Found 32-bit register for signal <csr_mhpmcounter<0>>.
    Found 32-bit register for signal <csr_mhpmcounter<1>>.
    Found 32-bit register for signal <csr_mhpmcounter<2>>.
    Found 32-bit register for signal <csr_mhpmcounter<3>>.
    Found 15-bit register for signal <cnt_event>.
    Found 4-bit register for signal <hpmcnt_trigger>.
    Found 1-bit register for signal <csr_re>.
    Found 32-bit register for signal <csr_rdata>.
    Found 1-bit register for signal <ctrl<22>>.
    Found 1-bit register for signal <ctrl<21>>.
    Found 1-bit register for signal <ctrl<20>>.
    Found 1-bit register for signal <ctrl<19>>.
    Found 1-bit register for signal <ctrl<18>>.
    Found 1-bit register for signal <ctrl<17>>.
    Found 1-bit register for signal <ctrl<16>>.
    Found 1-bit register for signal <ctrl<15>>.
    Found 1-bit register for signal <ctrl<14>>.
    Found 1-bit register for signal <ctrl<13>>.
    Found 1-bit register for signal <ctrl<12>>.
    Found 1-bit register for signal <ctrl<11>>.
    Found 1-bit register for signal <ctrl<10>>.
    Found 1-bit register for signal <ctrl<9>>.
    Found 1-bit register for signal <ctrl<8>>.
    Found 1-bit register for signal <ctrl<7>>.
    Found 1-bit register for signal <ctrl<6>>.
    Found 1-bit register for signal <ctrl<5>>.
    Found 1-bit register for signal <ctrl<4>>.
    Found 1-bit register for signal <ctrl<3>>.
    Found 1-bit register for signal <ctrl<2>>.
    Found 1-bit register for signal <ctrl<1>>.
    Found 1-bit register for signal <ctrl<0>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<19>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<18>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<17>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<16>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<15>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<14>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<13>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<12>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<11>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<10>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<9>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<8>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<7>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<6>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<5>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<4>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<3>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<2>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<1>>.
    Found 1-bit register for signal <trap_ctrl_irq_buf<0>>.
    Found finite state machine <FSM_0> for signal <execute_engine_state>.
    -----------------------------------------------------------------------
    | States             | 14                                             |
    | Transitions        | 38                                             |
    | Inputs             | 23                                             |
    | Outputs            | 17                                             |
    | Clock              | clk_i (rising_edge)                            |
    | Reset              | rstn_i (negative)                              |
    | Reset type         | asynchronous                                   |
    | Reset State        | sys_wait                                       |
    | Power Up State     | sys_wait                                       |
    | Encoding           | auto                                           |
    | Implementation     | LUT                                            |
    -----------------------------------------------------------------------
    Found 32-bit adder for signal <fetch_engine_pc[31]_GND_8_o_add_3_OUT> created at line 1241.
    Found 32-bit adder for signal <execute_engine_pc[31]_execute_engine_next_pc_inc[31]_add_45_OUT> created at line 749.
    Found 32-bit adder for signal <csr_mcycleh[31]_GND_8_o_add_803_OUT> created at line 2340.
    Found 32-bit adder for signal <csr_minstreth[31]_GND_8_o_add_810_OUT> created at line 2365.
    Found 8-bit adder for signal <csr_mhpmcounterh[0][7]_GND_8_o_add_817_OUT> created at line 2393.
    Found 8-bit adder for signal <csr_mhpmcounterh[1][7]_GND_8_o_add_822_OUT> created at line 2393.
    Found 8-bit adder for signal <csr_mhpmcounterh[2][7]_GND_8_o_add_827_OUT> created at line 2393.
    Found 8-bit adder for signal <csr_mhpmcounterh[3][7]_GND_8_o_add_832_OUT> created at line 2393.
    Found 33-bit adder for signal <csr_mcycle_nxt> created at line 1241.
    Found 33-bit adder for signal <csr_minstret_nxt> created at line 1241.
    Found 33-bit adder for signal <csr_mhpmcounter_nxt<0>> created at line 1241.
    Found 33-bit adder for signal <csr_mhpmcounter_nxt<1>> created at line 1241.
    Found 33-bit adder for signal <csr_mhpmcounter_nxt<2>> created at line 1241.
    Found 33-bit adder for signal <csr_mhpmcounter_nxt<3>> created at line 1241.
    Found 4x1-bit Read Only RAM for signal <execute_engine_i_reg[13]_GND_8_o_Mux_84_o>
    Found 8x3-bit Read Only RAM for signal <_n17101>
    Found 1-bit 5-to-1 multiplexer for signal <execute_engine_branch_taken> created at line 668.
    Found 1-bit 3-to-1 multiplexer for signal <execute_engine_i_reg[13]_decode_aux_rs1_is_r0_Mux_144_o> created at line 1144.
    Found 32-bit 3-to-1 multiplexer for signal <csr_wdata> created at line 1904.
    WARNING:Xst:2404 -  FFs/Latches <csr_frm<1:3>> (without init value) have a constant value of 0 in block <neorv32_cpu_control>.
    WARNING:Xst:2404 -  FFs/Latches <trap_ctrl_irq_buf<21:20>> (without init value) have a constant value of 0 in block <neorv32_cpu_control>.
    WARNING:Xst:2404 -  FFs/Latches <trap_ctrl_exc_buf<10:10>> (without init value) have a constant value of 0 in block <neorv32_cpu_control>.
    Summary:
	inferred   2 RAM(s).
	inferred  14 Adder/Subtractor(s).
	inferred 912 D-type flip-flop(s).
	inferred 306 Multiplexer(s).
	inferred   1 Finite State Machine(s).
Unit <neorv32_cpu_control> synthesized.

Synthesizing Unit <neorv32_fifo>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_fifo.vhd".
        FIFO_DEPTH = 2
        FIFO_WIDTH = 34
        FIFO_RSYNC = false
        FIFO_SAFE = false
    Found 2-bit register for signal <fifo_r_pnt>.
    Found 34-bit register for signal <fifo_data<0>>.
    Found 34-bit register for signal <fifo_data<1>>.
    Found 2-bit register for signal <fifo_w_pnt>.
    Found 2-bit adder for signal <fifo_w_pnt[1]_GND_9_o_add_0_OUT> created at line 1241.
    Found 2-bit adder for signal <fifo_r_pnt[1]_GND_9_o_add_3_OUT> created at line 1241.
    Found 2-bit subtractor for signal <GND_9_o_GND_9_o_sub_10_OUT<1:0>> created at line 129.
    Found 1-bit comparator equal for signal <fifo_match> created at line 124
    Summary:
	inferred   3 Adder/Subtractor(s).
	inferred  72 D-type flip-flop(s).
	inferred   1 Comparator(s).
	inferred   2 Multiplexer(s).
Unit <neorv32_fifo> synthesized.

Synthesizing Unit <neorv32_cpu_decompressor>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_cpu_decompressor.vhd".
    Found 32-bit 8-to-1 multiplexer for signal <ci_instr16_i[15]_ci_instr16_i[12]_wide_mux_27_OUT> created at line 182.
    Found 32-bit 6-to-1 multiplexer for signal <ci_instr16_i[15]_GND_10_o_wide_mux_36_OUT> created at line 355.
    Found 1-bit 4-to-1 multiplexer for signal <ci_illegal_o> created at line 112.
    Found 32-bit 4-to-1 multiplexer for signal <ci_instr32_o> created at line 112.
    Summary:
	inferred  61 Multiplexer(s).
Unit <neorv32_cpu_decompressor> synthesized.

Synthesizing Unit <neorv32_cpu_regfile>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_cpu_regfile.vhd".
        CPU_EXTENSION_RISCV_E = false
WARNING:Xst:647 - Input <ctrl_i<25:18>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <ctrl_i<75:27>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
    Found 32x32-bit dual-port RAM <Mram_reg_file> for signal <reg_file>.
    Found 32-bit register for signal <rs2>.
    Found 32-bit register for signal <rs1>.
    Found 32-bit comparator equal for signal <cmp_o<0>> created at line 139
    Found 33-bit comparator greater for signal <cmp_o<1>> created at line 140
    Summary:
	inferred   1 RAM(s).
	inferred  64 D-type flip-flop(s).
	inferred   2 Comparator(s).
	inferred   3 Multiplexer(s).
Unit <neorv32_cpu_regfile> synthesized.

Synthesizing Unit <neorv32_cpu_alu>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_cpu_alu.vhd".
        CPU_EXTENSION_RISCV_M = true
        CPU_EXTENSION_RISCV_Zmmul = false
        CPU_EXTENSION_RISCV_Zfinx = false
        FAST_MUL_EN = false
        FAST_SHIFT_EN = false
WARNING:Xst:647 - Input <cmp_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
    Found 1-bit register for signal <cp_ctrl_cmd_ff>.
    Found 33-bit adder for signal <n0075> created at line 131.
    Found 33-bit adder for signal <addsub_res> created at line 131.
    Found 32-bit 4-to-1 multiplexer for signal <logic_res> created at line 200.
    Found 32-bit 4-to-1 multiplexer for signal <res_o> created at line 214.
    Summary:
	inferred   2 Adder/Subtractor(s).
	inferred   1 D-type flip-flop(s).
	inferred   6 Multiplexer(s).
Unit <neorv32_cpu_alu> synthesized.

Synthesizing Unit <neorv32_cpu_cp_shifter>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_cpu_cp_shifter.vhd".
        FAST_SHIFT_EN = false
WARNING:Xst:647 - Input <ctrl_i<24:0>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <ctrl_i<26:26>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <ctrl_i<75:29>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <rs2_i<31:5>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <imm_i<31:5>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
    Found 1-bit register for signal <shifter_busy>.
    Found 1-bit register for signal <shifter_busy_ff>.
    Found 5-bit register for signal <shifter_cnt>.
    Found 32-bit register for signal <shifter_sreg>.
    Found 5-bit subtractor for signal <GND_17_o_GND_17_o_sub_2_OUT<4:0>> created at line 1308.
    Summary:
	inferred   1 Adder/Subtractor(s).
	inferred  39 D-type flip-flop(s).
	inferred   5 Multiplexer(s).
Unit <neorv32_cpu_cp_shifter> synthesized.

Synthesizing Unit <neorv32_cpu_cp_muldiv>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_cpu_cp_muldiv.vhd".
        FAST_MUL_EN = false
        DIVISION_EN = true
WARNING:Xst:647 - Input <ctrl_i<48:0>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <ctrl_i<75:52>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
    Found 3-bit register for signal <state>.
    Found 1-bit register for signal <start_div>.
    Found 1-bit register for signal <valid>.
    Found 1-bit register for signal <div_res_corr>.
    Found 1-bit register for signal <opy_is_zero>.
    Found 32-bit register for signal <div_opy>.
    Found 5-bit register for signal <cnt>.
    Found 3-bit register for signal <cp_op_ff>.
    Found 64-bit register for signal <mul_product>.
    Found 32-bit register for signal <quotient>.
    Found 32-bit register for signal <remainder>.
    Found 32-bit register for signal <res_o>.
    Found 32-bit register for signal <div_opx>.
    Found finite state machine <FSM_1> for signal <state>.
    -----------------------------------------------------------------------
    | States             | 5                                              |
    | Transitions        | 8                                              |
    | Inputs             | 3                                              |
    | Outputs            | 7                                              |
    | Clock              | clk_i (rising_edge)                            |
    | Reset              | rstn_i (negative)                              |
    | Reset type         | asynchronous                                   |
    | Reset State        | idle                                           |
    | Power Up State     | idle                                           |
    | Encoding           | auto                                           |
    | Implementation     | LUT                                            |
    -----------------------------------------------------------------------
    Found 33-bit adder for signal <mul_p_sext_rs1_i[31]_add_41_OUT> created at line 262.
    Found 5-bit subtractor for signal <GND_19_o_GND_19_o_sub_11_OUT<4:0>> created at line 1308.
    Found 33-bit subtractor for signal <GND_19_o_GND_19_o_sub_41_OUT<32:0>> created at line 260.
    Found 33-bit subtractor for signal <div_sub> created at line 101.
    Found 32-bit subtractor for signal <GND_19_o_GND_19_o_sub_7_OUT<31:0>> created at line 1314.
    Found 32-bit subtractor for signal <GND_19_o_GND_19_o_sub_9_OUT<31:0>> created at line 1314.
    Found 32-bit subtractor for signal <div_sign_comp> created at line 103.
    Found 32-bit 7-to-1 multiplexer for signal <cp_op_ff[2]_remainder[31]_wide_mux_60_OUT> created at line 325.
    Summary:
	inferred   6 Adder/Subtractor(s).
	inferred 236 D-type flip-flop(s).
	inferred  14 Multiplexer(s).
	inferred   1 Finite State Machine(s).
Unit <neorv32_cpu_cp_muldiv> synthesized.

Synthesizing Unit <neorv32_cpu_bus>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_cpu_bus.vhd".
        CPU_EXTENSION_RISCV_A = false
        CPU_EXTENSION_RISCV_C = true
        PMP_NUM_REGIONS = 0
        PMP_MIN_GRANULARITY = 65536
WARNING:Xst:647 - Input <ctrl_i<31:0>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <ctrl_i<75:44>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <fetch_pc_i<1:0>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<0>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<1>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<2>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<3>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<4>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<5>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<6>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<7>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<8>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<9>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<10>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<11>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<12>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<13>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<14>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<15>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<16>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<17>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<18>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<19>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<20>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<21>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<22>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<23>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<24>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<25>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<26>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<27>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<28>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<29>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<30>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<31>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<32>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<33>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<34>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<35>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<36>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<37>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<38>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<39>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<40>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<41>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<42>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<43>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<44>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<45>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<46>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<47>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<48>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<49>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<50>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<51>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<52>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<53>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<54>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<55>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<56>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<57>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<58>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<59>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<60>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<61>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<62>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_addr_i<63>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<0>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<1>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<2>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<3>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<4>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<5>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<6>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<7>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<8>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<9>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<10>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<11>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<12>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<13>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<14>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<15>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<16>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<17>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<18>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<19>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<20>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<21>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<22>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<23>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<24>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<25>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<26>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<27>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<28>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<29>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<30>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<31>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<32>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<33>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<34>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<35>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<36>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<37>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<38>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<39>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<40>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<41>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<42>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<43>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<44>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<45>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<46>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<47>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<48>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<49>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<50>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<51>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<52>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<53>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<54>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<55>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<56>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<57>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<58>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<59>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<60>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<61>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<62>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <pmp_ctrl_i<63>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
    Found 4-bit register for signal <n0276>.
    Found 1-bit register for signal <i_arbiter_rd_req>.
    Found 1-bit register for signal <i_arbiter_err_align>.
    Found 1-bit register for signal <i_arbiter_err_bus>.
    Found 32-bit register for signal <mdo>.
    Found 32-bit register for signal <mdi>.
    Found 32-bit register for signal <mar>.
    Found 4x4-bit Read Only RAM for signal <mar[1]_PWR_21_o_wide_mux_7_OUT>
    Found 1-bit 3-to-1 multiplexer for signal <d_misaligned> created at line 201.
    Found 1-bit 3-to-1 multiplexer for signal <d_bus_wdata<31>> created at line 232.
    Found 1-bit 3-to-1 multiplexer for signal <d_bus_wdata<30>> created at line 232.
    Found 1-bit 3-to-1 multiplexer for signal <d_bus_wdata<29>> created at line 232.
    Found 1-bit 3-to-1 multiplexer for signal <d_bus_wdata<28>> created at line 232.
    Found 1-bit 3-to-1 multiplexer for signal <d_bus_wdata<27>> created at line 232.
    Found 1-bit 3-to-1 multiplexer for signal <d_bus_wdata<26>> created at line 232.
    Found 1-bit 3-to-1 multiplexer for signal <d_bus_wdata<25>> created at line 232.
    Found 1-bit 3-to-1 multiplexer for signal <d_bus_wdata<24>> created at line 232.
    Found 4-bit 3-to-1 multiplexer for signal <d_bus_ben> created at line 232.
    Found 8-bit 4-to-1 multiplexer for signal <read_align.byte_in_v> created at line 278.
    Found 32-bit 3-to-1 multiplexer for signal <rdata_align> created at line 285.
    WARNING:Xst:2404 -  FFs/Latches <exclusive_lock<0:0>> (without init value) have a constant value of 0 in block <neorv32_cpu_bus>.
    Summary:
	inferred   1 RAM(s).
	inferred 103 D-type flip-flop(s).
	inferred  35 Multiplexer(s).
Unit <neorv32_cpu_bus> synthesized.

Synthesizing Unit <neorv32_busswitch>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_busswitch.vhd".
        PORT_CA_READ_ONLY = false
        PORT_CB_READ_ONLY = true
WARNING:Xst:647 - Input <cb_bus_wdata_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <cb_bus_ben_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
    Found 3-bit register for signal <arbiter_state>.
    Found 1-bit register for signal <ca_wr_req_buf>.
    Found 1-bit register for signal <cb_rd_req_buf>.
    Found 1-bit register for signal <cb_wr_req_buf>.
    Found 1-bit register for signal <ca_rd_req_buf>.
    Found finite state machine <FSM_2> for signal <arbiter_state>.
    -----------------------------------------------------------------------
    | States             | 5                                              |
    | Transitions        | 12                                             |
    | Inputs             | 6                                              |
    | Outputs            | 5                                              |
    | Clock              | clk_i (rising_edge)                            |
    | Reset              | rstn_i (negative)                              |
    | Reset type         | asynchronous                                   |
    | Reset State        | idle                                           |
    | Power Up State     | idle                                           |
    | Encoding           | auto                                           |
    | Implementation     | LUT                                            |
    -----------------------------------------------------------------------
    Summary:
	inferred   4 D-type flip-flop(s).
	inferred  17 Multiplexer(s).
	inferred   1 Finite State Machine(s).
Unit <neorv32_busswitch> synthesized.

Synthesizing Unit <neorv32_bus_keeper>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_bus_keeper.vhd".
        MEM_EXT_EN = false
        MEM_INT_IMEM_EN = true
        MEM_INT_IMEM_SIZE = 8192
        MEM_INT_DMEM_EN = true
        MEM_INT_DMEM_SIZE = 8192
WARNING:Xst:647 - Input <addr_i> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
    Found 1-bit register for signal <control_bus_err>.
    Found 1-bit register for signal <control_pending>.
    Found 4-bit register for signal <control_timeout>.
    Found 4-bit subtractor for signal <GND_24_o_GND_24_o_sub_4_OUT<3:0>> created at line 1308.
    Summary:
	inferred   1 Adder/Subtractor(s).
	inferred   6 D-type flip-flop(s).
	inferred   2 Multiplexer(s).
Unit <neorv32_bus_keeper> synthesized.

Synthesizing Unit <neorv32_imem>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_imem.vhd".
        IMEM_BASE = "00000000000000000000000000000000"
        IMEM_SIZE = 8192
        IMEM_AS_IROM = false
WARNING:Xst:647 - Input <addr_i<1:0>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
    Found 2048x8-bit single-port RAM <Mram_mem_ram_b0> for signal <mem_ram_b0>.
    Found 2048x8-bit single-port RAM <Mram_mem_ram_b1> for signal <mem_ram_b1>.
    Found 2048x8-bit single-port RAM <Mram_mem_ram_b2> for signal <mem_ram_b2>.
    Found 2048x8-bit single-port RAM <Mram_mem_ram_b3> for signal <mem_ram_b3>.
    Found 8-bit register for signal <mem_b1_rd>.
    Found 8-bit register for signal <mem_b2_rd>.
    Found 8-bit register for signal <mem_b3_rd>.
    Found 1-bit register for signal <rden>.
    Found 1-bit register for signal <ack_o>.
    Found 8-bit register for signal <mem_b0_rd>.
    Summary:
	inferred   4 RAM(s).
	inferred  34 D-type flip-flop(s).
	inferred   1 Multiplexer(s).
Unit <neorv32_imem> synthesized.

Synthesizing Unit <neorv32_dmem>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_dmem.vhd".
        DMEM_BASE = "10000000000000000000000000000000"
        DMEM_SIZE = 8192
WARNING:Xst:647 - Input <addr_i<1:0>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
    Found 2048x8-bit single-port RAM <Mram_mem_ram_b0> for signal <mem_ram_b0>.
    Found 2048x8-bit single-port RAM <Mram_mem_ram_b1> for signal <mem_ram_b1>.
    Found 2048x8-bit single-port RAM <Mram_mem_ram_b2> for signal <mem_ram_b2>.
    Found 2048x8-bit single-port RAM <Mram_mem_ram_b3> for signal <mem_ram_b3>.
    Found 8-bit register for signal <mem_ram_b1_rd>.
    Found 8-bit register for signal <mem_ram_b2_rd>.
    Found 8-bit register for signal <mem_ram_b3_rd>.
    Found 1-bit register for signal <rden>.
    Found 1-bit register for signal <ack_o>.
    Found 8-bit register for signal <mem_ram_b0_rd>.
    Summary:
	inferred   4 RAM(s).
	inferred  34 D-type flip-flop(s).
	inferred   1 Multiplexer(s).
Unit <neorv32_dmem> synthesized.

Synthesizing Unit <neorv32_boot_rom>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_boot_rom.vhd".
        BOOTROM_BASE = "11111111111111110000000000000000"
WARNING:Xst:647 - Input <addr_i<1:0>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <addr_i<14:12>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
    Found 32-bit register for signal <rdata>.
    Found 1-bit register for signal <rden>.
    Found 1024x32-bit Read Only RAM for signal <addr[9]_GND_30_o_wide_mux_2_OUT>
    Summary:
	inferred   1 RAM(s).
	inferred  33 D-type flip-flop(s).
	inferred   1 Multiplexer(s).
Unit <neorv32_boot_rom> synthesized.

Synthesizing Unit <neorv32_gpio>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_gpio.vhd".
WARNING:Xst:647 - Input <addr_i<1:0>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <addr_i<31:9>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
    Found 32-bit register for signal <dout_lo>.
    Found 32-bit register for signal <dout_hi>.
    Found 32-bit register for signal <data_o>.
    Found 1-bit register for signal <ack_o>.
    Found 32-bit 3-to-1 multiplexer for signal <PWR_30_o_din_lo[31]_select_13_OUT> created at line 107.
    WARNING:Xst:2404 -  FFs/Latches <din_lo<63:32>> (without init value) have a constant value of 0 in block <neorv32_gpio>.
    WARNING:Xst:2404 -  FFs/Latches <din_hi<31:0>> (without init value) have a constant value of 0 in block <neorv32_gpio>.
    Summary:
	inferred  97 D-type flip-flop(s).
	inferred   1 Multiplexer(s).
Unit <neorv32_gpio> synthesized.

Synthesizing Unit <neorv32_wdt>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_wdt.vhd".
WARNING:Xst:647 - Input <addr_i<1:0>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <addr_i<31:9>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <data_i<5:5>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <data_i<31:9>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
    Found 1-bit register for signal <rstn_sync>.
    Found 3-bit register for signal <ctrl_reg_clk_sel>.
    Found 4-bit register for signal <rst_gen>.
    Found 1-bit register for signal <ctrl_reg_mode>.
    Found 1-bit register for signal <ctrl_reg_reset>.
    Found 1-bit register for signal <ctrl_reg_enforce>.
    Found 1-bit register for signal <ctrl_reg_lock>.
    Found 1-bit register for signal <ctrl_reg_rcause>.
    Found 1-bit register for signal <ctrl_reg_enable>.
    Found 21-bit register for signal <wdt_cnt>.
    Found 1-bit register for signal <ack_o>.
    Found 32-bit register for signal <data_o>.
    Found 21-bit adder for signal <wdt_cnt[20]_GND_32_o_add_6_OUT> created at line 1241.
    Found 1-bit 8-to-1 multiplexer for signal <prsc_tick> created at line 164.
    Summary:
	inferred   1 Adder/Subtractor(s).
	inferred  68 D-type flip-flop(s).
	inferred  10 Multiplexer(s).
Unit <neorv32_wdt> synthesized.

Synthesizing Unit <neorv32_mtime>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_mtime.vhd".
WARNING:Xst:647 - Input <addr_i<1:0>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <addr_i<31:9>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
    Found 32-bit register for signal <mtimecmp_hi>.
    Found 1-bit register for signal <mtime_lo_we>.
    Found 1-bit register for signal <mtime_hi_we>.
    Found 32-bit register for signal <mtime_lo>.
    Found 1-bit register for signal <mtime_lo_ovfl>.
    Found 32-bit register for signal <mtime_hi>.
    Found 1-bit register for signal <ack_o>.
    Found 32-bit register for signal <data_o>.
    Found 1-bit register for signal <cmp_lo_ff>.
    Found 1-bit register for signal <cmp_match_ff>.
    Found 1-bit register for signal <irq_o>.
    Found 32-bit register for signal <mtimecmp_lo>.
    Found 32-bit adder for signal <mtime_hi[31]_GND_34_o_add_11_OUT> created at line 132.
    Found 33-bit adder for signal <mtime_lo_nxt> created at line 1241.
    Found 32-bit 4-to-1 multiplexer for signal <PWR_32_o_mtime_lo[31]_select_22_OUT> created at line 149.
    Found 32-bit comparator lessequal for signal <n0039> created at line 179
    Found 32-bit comparator lessequal for signal <n0041> created at line 180
    Summary:
	inferred   2 Adder/Subtractor(s).
	inferred 167 D-type flip-flop(s).
	inferred   2 Comparator(s).
	inferred   3 Multiplexer(s).
Unit <neorv32_mtime> synthesized.

Synthesizing Unit <neorv32_uart>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_uart.vhd".
        UART_PRIMARY = true
WARNING:Xst:647 - Input <addr_i<1:0>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <addr_i<31:9>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <data_i<19:13>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <data_i<27:27>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <data_i<31:29>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
    Found 32-bit register for signal <ctrl>.
    Found 32-bit register for signal <data_o>.
    Found 1-bit register for signal <uart_tx_busy>.
    Found 1-bit register for signal <uart_tx_done>.
    Found 4-bit register for signal <uart_tx_bitcnt>.
    Found 11-bit register for signal <uart_tx_sreg>.
    Found 12-bit register for signal <uart_tx_baud_cnt>.
    Found 1-bit register for signal <uart_tx_tx_granted>.
    Found 1-bit register for signal <uart_txd_o>.
    Found 5-bit register for signal <uart_rx_sync>.
    Found 1-bit register for signal <uart_rx_busy>.
    Found 1-bit register for signal <uart_rx_busy_ff>.
    Found 4-bit register for signal <uart_rx_bitcnt>.
    Found 10-bit register for signal <uart_rx_sreg>.
    Found 12-bit register for signal <uart_rx_baud_cnt>.
    Found 3-bit register for signal <uart_rx_avail>.
    Found 8-bit register for signal <uart_rx_data<0>>.
    Found 8-bit register for signal <uart_rx_data<1>>.
    Found 2-bit register for signal <uart_rx_ferr>.
    Found 2-bit register for signal <uart_rx_perr>.
    Found 2-bit register for signal <uart_cts_ff>.
    Found 1-bit register for signal <uart_rts_o>.
    Found 1-bit register for signal <ack_o>.
    Found 4-bit subtractor for signal <GND_36_o_GND_36_o_sub_16_OUT<3:0>> created at line 1308.
    Found 12-bit subtractor for signal <GND_36_o_GND_36_o_sub_17_OUT<11:0>> created at line 1308.
    Found 4-bit subtractor for signal <GND_36_o_GND_36_o_sub_37_OUT<3:0>> created at line 1308.
    Found 12-bit subtractor for signal <GND_36_o_GND_36_o_sub_38_OUT<11:0>> created at line 1308.
    Found 1-bit 8-to-1 multiplexer for signal <uart_clk> created at line 266.
    Summary:
	inferred   4 Adder/Subtractor(s).
	inferred 155 D-type flip-flop(s).
	inferred  19 Multiplexer(s).
Unit <neorv32_uart> synthesized.

Synthesizing Unit <neorv32_sysinfo>.
    Related source file is "E:\VHDL\neorv32\rtl\core\neorv32_sysinfo.vhd".
        CLOCK_FREQUENCY = 100000000
        INT_BOOTLOADER_EN = true
        USER_CODE = "00000000000000000000000000000000"
        MEM_INT_IMEM_EN = true
        MEM_INT_IMEM_SIZE = 8192
        MEM_INT_DMEM_EN = true
        MEM_INT_DMEM_SIZE = 8192
        ICACHE_EN = false
        ICACHE_NUM_BLOCKS = 4
        ICACHE_BLOCK_SIZE = 64
        ICACHE_ASSOCIATIVITY = 1
        MEM_EXT_EN = false
        ON_CHIP_DEBUGGER_EN = false
        IO_GPIO_EN = true
        IO_MTIME_EN = true
        IO_UART0_EN = true
        IO_UART1_EN = false
        IO_SPI_EN = false
        IO_TWI_EN = false
        IO_PWM_NUM_CH = 0
        IO_WDT_EN = true
        IO_TRNG_EN = false
        IO_CFS_EN = false
        IO_SLINK_EN = false
        IO_NEOLED_EN = false
        IO_XIRQ_NUM_CH = 0
WARNING:Xst:647 - Input <addr_i<1:0>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <addr_i<31:9>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
    Found 32-bit register for signal <data_o>.
    Found 1-bit register for signal <ack_o>.
    Found 8x32-bit Read Only RAM for signal <info_addr[2]_sysinfo_mem[7][31]_wide_mux_19_OUT>
    Summary:
	inferred   1 RAM(s).
	inferred  33 D-type flip-flop(s).
Unit <neorv32_sysinfo> synthesized.

=========================================================================
HDL Synthesis Report

Macro Statistics
# RAMs                                                 : 14
 1024x32-bit single-port Read Only RAM                 : 1
 2048x8-bit single-port RAM                            : 8
 32x32-bit dual-port RAM                               : 1
 4x1-bit single-port Read Only RAM                     : 1
 4x4-bit single-port Read Only RAM                     : 1
 8x3-bit single-port Read Only RAM                     : 1
 8x32-bit single-port Read Only RAM                    : 1
# Adders/Subtractors                                   : 35
 12-bit adder                                          : 1
 12-bit subtractor                                     : 2
 2-bit adder                                           : 2
 2-bit subtractor                                      : 1
 21-bit adder                                          : 1
 32-bit adder                                          : 5
 32-bit subtractor                                     : 3
 33-bit adder                                          : 9
 33-bit addsub                                         : 1
 33-bit subtractor                                     : 1
 4-bit subtractor                                      : 3
 5-bit subtractor                                      : 2
 8-bit adder                                           : 4
# Registers                                            : 269
 1-bit register                                        : 170
 10-bit register                                       : 2
 11-bit register                                       : 2
 12-bit register                                       : 3
 15-bit register                                       : 5
 16-bit register                                       : 1
 18-bit register                                       : 1
 2-bit register                                        : 8
 21-bit register                                       : 1
 22-bit register                                       : 1
 3-bit register                                        : 3
 32-bit register                                       : 42
 34-bit register                                       : 2
 4-bit register                                        : 8
 5-bit register                                        : 3
 6-bit register                                        : 1
 64-bit register                                       : 2
 7-bit register                                        : 1
 8-bit register                                        : 13
# Comparators                                          : 5
 1-bit comparator equal                                : 1
 32-bit comparator equal                               : 1
 32-bit comparator lessequal                           : 2
 33-bit comparator greater                             : 1
# Multiplexers                                         : 487
 1-bit 2-to-1 multiplexer                              : 324
 1-bit 3-to-1 multiplexer                              : 10
 1-bit 4-to-1 multiplexer                              : 1
 1-bit 5-to-1 multiplexer                              : 1
 1-bit 8-to-1 multiplexer                              : 2
 11-bit 2-to-1 multiplexer                             : 2
 12-bit 2-to-1 multiplexer                             : 4
 15-bit 2-to-1 multiplexer                             : 4
 16-bit 2-to-1 multiplexer                             : 2
 2-bit 2-to-1 multiplexer                              : 4
 22-bit 2-to-1 multiplexer                             : 20
 3-bit 2-to-1 multiplexer                              : 2
 32-bit 2-to-1 multiplexer                             : 49
 32-bit 3-to-1 multiplexer                             : 3
 32-bit 4-to-1 multiplexer                             : 4
 32-bit 6-to-1 multiplexer                             : 1
 32-bit 7-to-1 multiplexer                             : 1
 32-bit 8-to-1 multiplexer                             : 1
 33-bit 2-to-1 multiplexer                             : 2
 34-bit 2-to-1 multiplexer                             : 1
 36-bit 2-to-1 multiplexer                             : 5
 4-bit 2-to-1 multiplexer                              : 4
 4-bit 3-to-1 multiplexer                              : 1
 5-bit 2-to-1 multiplexer                              : 5
 6-bit 2-to-1 multiplexer                              : 1
 64-bit 2-to-1 multiplexer                             : 1
 7-bit 2-to-1 multiplexer                              : 28
 76-bit 2-to-1 multiplexer                             : 1
 8-bit 2-to-1 multiplexer                              : 2
 8-bit 4-to-1 multiplexer                              : 1
# Tristates                                            : 2
 1-bit tristate buffer                                 : 2
# FSMs                                                 : 3
# Xors                                                 : 6
 1-bit xor10                                           : 1
 1-bit xor2                                            : 3
 1-bit xor9                                            : 1
 32-bit xor2                                           : 1

=========================================================================

=========================================================================
*                       Advanced HDL Synthesis                          *
=========================================================================

INFO:Xst:2261 - The FF/Latch <csr_mhpmevent_0_1> in Unit <neorv32_cpu_control_inst> is equivalent to the following 3 FFs/Latches, which will be removed : <csr_mhpmevent_1_1> <csr_mhpmevent_2_1> <csr_mhpmevent_3_1> 
INFO:Xst:2261 - The FF/Latch <trap_ctrl_exc_ack> in Unit <neorv32_cpu_control_inst> is equivalent to the following FF/Latch, which will be removed : <trap_ctrl_env_start> 
INFO:Xst:2261 - The FF/Latch <data_o_6> in Unit <neorv32_wdt_inst_true.neorv32_wdt_inst> is equivalent to the following 24 FFs/Latches, which will be removed : <data_o_7> <data_o_9> <data_o_10> <data_o_11> <data_o_12> <data_o_13> <data_o_14> <data_o_15> <data_o_16> <data_o_17> <data_o_18> <data_o_19> <data_o_20> <data_o_21> <data_o_22> <data_o_23> <data_o_24> <data_o_25> <data_o_26> <data_o_27> <data_o_28> <data_o_29> <data_o_30> <data_o_31> 
WARNING:Xst:1710 - FF/Latch <uart_cts_ff_0> (without init value) has a constant value of 0 in block <neorv32_uart0_inst_true.neorv32_uart0_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_o_6> (without init value) has a constant value of 0 in block <neorv32_wdt_inst_true.neorv32_wdt_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <csr_mhpmevent_0_1> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <csr_mtvec_1> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <cnt_event_1> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <trap_ctrl_irq_buf_0> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <trap_ctrl_irq_buf_3> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <trap_ctrl_irq_buf_1> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <trap_ctrl_irq_buf_5> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <trap_ctrl_irq_buf_9> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <trap_ctrl_irq_buf_10> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <trap_ctrl_irq_buf_8> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <trap_ctrl_irq_buf_11> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <trap_ctrl_irq_buf_12> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <trap_ctrl_irq_buf_13> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <trap_ctrl_irq_buf_14> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <trap_ctrl_irq_buf_16> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <trap_ctrl_irq_buf_17> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <trap_ctrl_irq_buf_15> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <trap_ctrl_irq_buf_18> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <trap_ctrl_irq_buf_19> (without init value) has a constant value of 0 in block <neorv32_cpu_control_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <uart_cts_ff_1> (without init value) has a constant value of 0 in block <neorv32_uart0_inst_true.neorv32_uart0_inst>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:2677 - Node <execute_engine_last_pc_0> of sequential type is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:2677 - Node <csr_mtvec_0> of sequential type is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:2677 - Node <trap_ctrl_irq_ack_20> of sequential type is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:2677 - Node <trap_ctrl_irq_ack_21> of sequential type is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:2677 - Node <csr_mepc_0> of sequential type is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:2677 - Node <ctrl_13> of sequential type is unconnected in block <neorv32_uart0_inst_true.neorv32_uart0_inst>.
WARNING:Xst:2677 - Node <ctrl_14> of sequential type is unconnected in block <neorv32_uart0_inst_true.neorv32_uart0_inst>.
WARNING:Xst:2677 - Node <ctrl_15> of sequential type is unconnected in block <neorv32_uart0_inst_true.neorv32_uart0_inst>.
WARNING:Xst:2677 - Node <ctrl_16> of sequential type is unconnected in block <neorv32_uart0_inst_true.neorv32_uart0_inst>.
WARNING:Xst:2677 - Node <ctrl_17> of sequential type is unconnected in block <neorv32_uart0_inst_true.neorv32_uart0_inst>.
WARNING:Xst:2677 - Node <ctrl_18> of sequential type is unconnected in block <neorv32_uart0_inst_true.neorv32_uart0_inst>.
WARNING:Xst:2677 - Node <ctrl_19> of sequential type is unconnected in block <neorv32_uart0_inst_true.neorv32_uart0_inst>.
WARNING:Xst:2677 - Node <ctrl_27> of sequential type is unconnected in block <neorv32_uart0_inst_true.neorv32_uart0_inst>.
WARNING:Xst:2677 - Node <ctrl_29> of sequential type is unconnected in block <neorv32_uart0_inst_true.neorv32_uart0_inst>.
WARNING:Xst:2677 - Node <ctrl_30> of sequential type is unconnected in block <neorv32_uart0_inst_true.neorv32_uart0_inst>.
WARNING:Xst:2677 - Node <ctrl_31> of sequential type is unconnected in block <neorv32_uart0_inst_true.neorv32_uart0_inst>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <trap_ctrl_irq_ack_19> is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <trap_ctrl_irq_ack_18> is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <trap_ctrl_irq_ack_15> is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <trap_ctrl_irq_ack_17> is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <trap_ctrl_irq_ack_16> is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <trap_ctrl_irq_ack_14> is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <trap_ctrl_irq_ack_13> is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <trap_ctrl_irq_ack_12> is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <trap_ctrl_irq_ack_11> is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <trap_ctrl_irq_ack_8> is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <trap_ctrl_irq_ack_10> is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <trap_ctrl_irq_ack_9> is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <trap_ctrl_irq_ack_5> is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <trap_ctrl_irq_ack_1> is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <trap_ctrl_irq_ack_3> is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <trap_ctrl_irq_ack_0> is unconnected in block <neorv32_cpu_control_inst>.
WARNING:Xst:2404 -  FFs/Latches <data_o<31:9>> (without init value) have a constant value of 0 in block <neorv32_wdt>.
WARNING:Xst:2404 -  FFs/Latches <ctrl<31:29>> (without init value) have a constant value of 0 in block <neorv32_uart>.

Synthesizing (advanced) Unit <neorv32_boot_rom>.
INFO:Xst:3226 - The RAM <Mram_addr[9]_GND_30_o_wide_mux_2_OUT> will be implemented as a BLOCK RAM, absorbing the following register(s): <rdata>
    -----------------------------------------------------------------------
    | ram_type           | Block                               |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 1024-word x 32-bit                  |          |
    |     mode           | write-first                         |          |
    |     clkA           | connected to signal <clk_i>         | rise     |
    |     enA            | connected to signal <acc_en>        | high     |
    |     weA            | connected to signal <GND>           | high     |
    |     addrA          | connected to signal <addr_i>        |          |
    |     diA            | connected to signal <GND>           |          |
    |     doA            | connected to signal <rdata>         |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
Unit <neorv32_boot_rom> synthesized (advanced).

Synthesizing (advanced) Unit <neorv32_bus_keeper>.
The following registers are absorbed into counter <control_timeout>: 1 register on signal <control_timeout>.
Unit <neorv32_bus_keeper> synthesized (advanced).

Synthesizing (advanced) Unit <neorv32_cpu>.
INFO:Xst:3226 - The RAM <neorv32_cpu_regfile_inst/Mram_reg_file> will be implemented as a BLOCK RAM, absorbing the following register(s): <neorv32_cpu_regfile_inst/rs1> <neorv32_cpu_regfile_inst/rs2>
    -----------------------------------------------------------------------
    | ram_type           | Block                               |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 32-word x 32-bit                    |          |
    |     mode           | read-first                          |          |
    |     clkA           | connected to signal <clk_i>         | rise     |
    |     weA            | connected to signal <neorv32_cpu_regfile_inst/rf_we> | high     |
    |     addrA          | connected to signal <neorv32_cpu_regfile_inst/opa_addr> |          |
    |     diA            | connected to signal <neorv32_cpu_regfile_inst/rf_wdata> |          |
    |     doA            | connected to signal <rs1>           |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
    | Port B                                                              |
    |     aspect ratio   | 32-word x 32-bit                    |          |
    |     mode           | write-first                         |          |
    |     clkB           | connected to signal <clk_i>         | rise     |
    |     addrB          | connected to signal <(ctrl<10>,ctrl)> |          |
    |     doB            | connected to signal <rs2>           |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
Unit <neorv32_cpu> synthesized (advanced).

Synthesizing (advanced) Unit <neorv32_cpu_bus>.
INFO:Xst:3226 - The RAM <Mram_mar[1]_PWR_21_o_wide_mux_7_OUT> will be implemented as a BLOCK RAM, absorbing the following register(s): <mar>
    -----------------------------------------------------------------------
    | ram_type           | Block                               |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 4-word x 4-bit                      |          |
    |     mode           | write-first                         |          |
    |     clkA           | connected to signal <clk_i>         | rise     |
    |     enA            | connected to signal <ctrl_i<37>>    | high     |
    |     weA            | connected to signal <GND>           | high     |
    |     addrA          | connected to signal <addr_i<1:0>>   |          |
    |     diA            | connected to signal <GND>           |          |
    |     doA            | connected to internal node          |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
Unit <neorv32_cpu_bus> synthesized (advanced).

Synthesizing (advanced) Unit <neorv32_cpu_control>.
The following registers are absorbed into accumulator <csr_mcycleh>: 1 register on signal <csr_mcycleh>.
The following registers are absorbed into accumulator <csr_minstreth>: 1 register on signal <csr_minstreth>.
INFO:Xst:3226 - The RAM <Mram_execute_engine_i_reg[13]_GND_8_o_Mux_84_o> will be implemented as a BLOCK RAM, absorbing the following register(s): <execute_engine_i_reg>
    -----------------------------------------------------------------------
    | ram_type           | Block                               |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 4-word x 1-bit                      |          |
    |     mode           | write-first                         |          |
    |     clkA           | connected to signal <clk_i>         | rise     |
    |     enA            | connected to internal node          | low      |
    |     weA            | connected to signal <GND>           | high     |
    |     addrA          | connected to signal <cmd_issue_data<13:12>> |          |
    |     diA            | connected to signal <GND>           |          |
    |     doA            | connected to internal node          |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
INFO:Xst:3226 - The RAM <Mram__n17101> will be implemented as a BLOCK RAM, absorbing the following register(s): <execute_engine_i_reg>
    -----------------------------------------------------------------------
    | ram_type           | Block                               |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 8-word x 3-bit                      |          |
    |     mode           | write-first                         |          |
    |     clkA           | connected to signal <clk_i>         | rise     |
    |     enA            | connected to internal node          | low      |
    |     weA            | connected to signal <GND>           | high     |
    |     addrA          | connected to signal <cmd_issue_data<14:12>> |          |
    |     diA            | connected to signal <GND>           |          |
    |     doA            | connected to internal node          |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
Unit <neorv32_cpu_control> synthesized (advanced).

Synthesizing (advanced) Unit <neorv32_cpu_cp_muldiv>.
The following registers are absorbed into counter <cnt>: 1 register on signal <cnt>.
Unit <neorv32_cpu_cp_muldiv> synthesized (advanced).

Synthesizing (advanced) Unit <neorv32_cpu_cp_shifter>.
The following registers are absorbed into counter <shifter_cnt>: 1 register on signal <shifter_cnt>.
Unit <neorv32_cpu_cp_shifter> synthesized (advanced).

Synthesizing (advanced) Unit <neorv32_dmem>.
INFO:Xst:3218 - HDL ADVISOR - The RAM <Mram_mem_ram_b0> will be implemented on LUTs either because you have described an asynchronous read or because of currently unsupported block RAM features. If you have described an asynchronous read, making it synchronous would allow you to take advantage of available block RAM resources, for optimized device usage and improved timings. Please refer to your documentation for coding guidelines.
    -----------------------------------------------------------------------
    | ram_type           | Distributed                         |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 2048-word x 8-bit                   |          |
    |     clkA           | connected to signal <clk_i>         | rise     |
    |     weA            | connected to signal <wren_i_ben_i[0]_AND_540_o_0> | high     |
    |     addrA          | connected to signal <addr_i<12:2>>  |          |
    |     diA            | connected to signal <data_i<7:0>>   |          |
    |     doA            | connected to internal node          |          |
    -----------------------------------------------------------------------
INFO:Xst:3218 - HDL ADVISOR - The RAM <Mram_mem_ram_b1> will be implemented on LUTs either because you have described an asynchronous read or because of currently unsupported block RAM features. If you have described an asynchronous read, making it synchronous would allow you to take advantage of available block RAM resources, for optimized device usage and improved timings. Please refer to your documentation for coding guidelines.
    -----------------------------------------------------------------------
    | ram_type           | Distributed                         |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 2048-word x 8-bit                   |          |
    |     clkA           | connected to signal <clk_i>         | rise     |
    |     weA            | connected to signal <wren_i_ben_i[1]_AND_541_o_0> | high     |
    |     addrA          | connected to signal <addr_i<12:2>>  |          |
    |     diA            | connected to signal <data_i<15:8>>  |          |
    |     doA            | connected to internal node          |          |
    -----------------------------------------------------------------------
INFO:Xst:3218 - HDL ADVISOR - The RAM <Mram_mem_ram_b2> will be implemented on LUTs either because you have described an asynchronous read or because of currently unsupported block RAM features. If you have described an asynchronous read, making it synchronous would allow you to take advantage of available block RAM resources, for optimized device usage and improved timings. Please refer to your documentation for coding guidelines.
    -----------------------------------------------------------------------
    | ram_type           | Distributed                         |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 2048-word x 8-bit                   |          |
    |     clkA           | connected to signal <clk_i>         | rise     |
    |     weA            | connected to signal <wren_i_ben_i[2]_AND_542_o_0> | high     |
    |     addrA          | connected to signal <addr_i<12:2>>  |          |
    |     diA            | connected to signal <data_i<23:16>> |          |
    |     doA            | connected to internal node          |          |
    -----------------------------------------------------------------------
INFO:Xst:3218 - HDL ADVISOR - The RAM <Mram_mem_ram_b3> will be implemented on LUTs either because you have described an asynchronous read or because of currently unsupported block RAM features. If you have described an asynchronous read, making it synchronous would allow you to take advantage of available block RAM resources, for optimized device usage and improved timings. Please refer to your documentation for coding guidelines.
    -----------------------------------------------------------------------
    | ram_type           | Distributed                         |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 2048-word x 8-bit                   |          |
    |     clkA           | connected to signal <clk_i>         | rise     |
    |     weA            | connected to signal <wren_i_ben_i[3]_AND_543_o_0> | high     |
    |     addrA          | connected to signal <addr_i<12:2>>  |          |
    |     diA            | connected to signal <data_i<31:24>> |          |
    |     doA            | connected to internal node          |          |
    -----------------------------------------------------------------------
Unit <neorv32_dmem> synthesized (advanced).

Synthesizing (advanced) Unit <neorv32_fifo>.
The following registers are absorbed into counter <fifo_r_pnt>: 1 register on signal <fifo_r_pnt>.
The following registers are absorbed into counter <fifo_w_pnt>: 1 register on signal <fifo_w_pnt>.
Unit <neorv32_fifo> synthesized (advanced).

Synthesizing (advanced) Unit <neorv32_imem>.
INFO:Xst:3218 - HDL ADVISOR - The RAM <Mram_mem_ram_b0> will be implemented on LUTs either because you have described an asynchronous read or because of currently unsupported block RAM features. If you have described an asynchronous read, making it synchronous would allow you to take advantage of available block RAM resources, for optimized device usage and improved timings. Please refer to your documentation for coding guidelines.
    -----------------------------------------------------------------------
    | ram_type           | Distributed                         |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 2048-word x 8-bit                   |          |
    |     clkA           | connected to signal <clk_i>         | rise     |
    |     weA            | connected to signal <wren_i_ben_i[0]_AND_532_o_0> | high     |
    |     addrA          | connected to signal <addr_i<12:2>>  |          |
    |     diA            | connected to signal <data_i<7:0>>   |          |
    |     doA            | connected to internal node          |          |
    -----------------------------------------------------------------------
INFO:Xst:3218 - HDL ADVISOR - The RAM <Mram_mem_ram_b1> will be implemented on LUTs either because you have described an asynchronous read or because of currently unsupported block RAM features. If you have described an asynchronous read, making it synchronous would allow you to take advantage of available block RAM resources, for optimized device usage and improved timings. Please refer to your documentation for coding guidelines.
    -----------------------------------------------------------------------
    | ram_type           | Distributed                         |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 2048-word x 8-bit                   |          |
    |     clkA           | connected to signal <clk_i>         | rise     |
    |     weA            | connected to signal <wren_i_ben_i[1]_AND_533_o_0> | high     |
    |     addrA          | connected to signal <addr_i<12:2>>  |          |
    |     diA            | connected to signal <data_i<15:8>>  |          |
    |     doA            | connected to internal node          |          |
    -----------------------------------------------------------------------
INFO:Xst:3218 - HDL ADVISOR - The RAM <Mram_mem_ram_b2> will be implemented on LUTs either because you have described an asynchronous read or because of currently unsupported block RAM features. If you have described an asynchronous read, making it synchronous would allow you to take advantage of available block RAM resources, for optimized device usage and improved timings. Please refer to your documentation for coding guidelines.
    -----------------------------------------------------------------------
    | ram_type           | Distributed                         |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 2048-word x 8-bit                   |          |
    |     clkA           | connected to signal <clk_i>         | rise     |
    |     weA            | connected to signal <wren_i_ben_i[2]_AND_534_o_0> | high     |
    |     addrA          | connected to signal <addr_i<12:2>>  |          |
    |     diA            | connected to signal <data_i<23:16>> |          |
    |     doA            | connected to internal node          |          |
    -----------------------------------------------------------------------
INFO:Xst:3218 - HDL ADVISOR - The RAM <Mram_mem_ram_b3> will be implemented on LUTs either because you have described an asynchronous read or because of currently unsupported block RAM features. If you have described an asynchronous read, making it synchronous would allow you to take advantage of available block RAM resources, for optimized device usage and improved timings. Please refer to your documentation for coding guidelines.
    -----------------------------------------------------------------------
    | ram_type           | Distributed                         |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 2048-word x 8-bit                   |          |
    |     clkA           | connected to signal <clk_i>         | rise     |
    |     weA            | connected to signal <wren_i_ben_i[3]_AND_535_o_0> | high     |
    |     addrA          | connected to signal <addr_i<12:2>>  |          |
    |     diA            | connected to signal <data_i<31:24>> |          |
    |     doA            | connected to internal node          |          |
    -----------------------------------------------------------------------
Unit <neorv32_imem> synthesized (advanced).

Synthesizing (advanced) Unit <neorv32_sysinfo>.
INFO:Xst:3226 - The RAM <Mram_info_addr[2]_sysinfo_mem[7][31]_wide_mux_19_OUT> will be implemented as a BLOCK RAM, absorbing the following register(s): <data_o>
    -----------------------------------------------------------------------
    | ram_type           | Block                               |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 8-word x 32-bit                     |          |
    |     mode           | write-first                         |          |
    |     clkA           | connected to signal <clk_i>         | rise     |
    |     weA            | connected to signal <GND>           | high     |
    |     addrA          | connected to signal <addr_i<4:2>>   |          |
    |     diA            | connected to signal <GND>           |          |
    |     doA            | connected to signal <data_o>        |          |
    |     dorstA         | connected to signal <rden>          | low      |
    | reset value        | 00000000000000000000000000000000               |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
Unit <neorv32_sysinfo> synthesized (advanced).

Synthesizing (advanced) Unit <neorv32_top>.
The following registers are absorbed into counter <clk_div>: 1 register on signal <clk_div>.
Unit <neorv32_top> synthesized (advanced).

Synthesizing (advanced) Unit <neorv32_uart>.
The following registers are absorbed into counter <uart_tx_bitcnt>: 1 register on signal <uart_tx_bitcnt>.
The following registers are absorbed into counter <uart_rx_bitcnt>: 1 register on signal <uart_rx_bitcnt>.
Unit <neorv32_uart> synthesized (advanced).

Synthesizing (advanced) Unit <neorv32_wdt>.
The following registers are absorbed into counter <wdt_cnt>: 1 register on signal <wdt_cnt>.
Unit <neorv32_wdt> synthesized (advanced).
WARNING:Xst:2677 - Node <neorv32_cpu_control_inst/execute_engine_last_pc_0> of sequential type is unconnected in block <neorv32_cpu>.
WARNING:Xst:2677 - Node <neorv32_cpu_control_inst/csr_mtvec_0> of sequential type is unconnected in block <neorv32_cpu>.
WARNING:Xst:2677 - Node <neorv32_cpu_control_inst/trap_ctrl_irq_ack_20> of sequential type is unconnected in block <neorv32_cpu>.
WARNING:Xst:2677 - Node <neorv32_cpu_control_inst/trap_ctrl_irq_ack_21> of sequential type is unconnected in block <neorv32_cpu>.
WARNING:Xst:2677 - Node <neorv32_cpu_control_inst/csr_mepc_0> of sequential type is unconnected in block <neorv32_cpu>.
WARNING:Xst:2677 - Node <ctrl_13> of sequential type is unconnected in block <neorv32_uart>.
WARNING:Xst:2677 - Node <ctrl_14> of sequential type is unconnected in block <neorv32_uart>.
WARNING:Xst:2677 - Node <ctrl_15> of sequential type is unconnected in block <neorv32_uart>.
WARNING:Xst:2677 - Node <ctrl_16> of sequential type is unconnected in block <neorv32_uart>.
WARNING:Xst:2677 - Node <ctrl_17> of sequential type is unconnected in block <neorv32_uart>.
WARNING:Xst:2677 - Node <ctrl_18> of sequential type is unconnected in block <neorv32_uart>.
WARNING:Xst:2677 - Node <ctrl_19> of sequential type is unconnected in block <neorv32_uart>.
WARNING:Xst:2677 - Node <ctrl_27> of sequential type is unconnected in block <neorv32_uart>.

=========================================================================
Advanced HDL Synthesis Report

Macro Statistics
# RAMs                                                 : 14
 1024x32-bit single-port block Read Only RAM           : 1
 2048x8-bit single-port distributed RAM                : 8
 32x32-bit dual-port block RAM                         : 1
 4x1-bit single-port block Read Only RAM               : 1
 4x4-bit single-port block Read Only RAM               : 1
 8x3-bit single-port block Read Only RAM               : 1
 8x32-bit single-port block Read Only RAM              : 1
# Adders/Subtractors                                   : 23
 12-bit subtractor                                     : 2
 2-bit subtractor                                      : 1
 32-bit adder                                          : 3
 32-bit subtractor                                     : 3
 33-bit adder                                          : 7
 33-bit adder carry in                                 : 1
 33-bit addsub                                         : 1
 33-bit subtractor                                     : 1
 8-bit adder                                           : 4
# Counters                                             : 9
 12-bit up counter                                     : 1
 2-bit up counter                                      : 2
 21-bit up counter                                     : 1
 4-bit down counter                                    : 3
 5-bit down counter                                    : 2
# Accumulators                                         : 2
 32-bit up loadable accumulator                        : 2
# Registers                                            : 1839
 Flip-Flops                                            : 1839
# Comparators                                          : 5
 1-bit comparator equal                                : 1
 32-bit comparator equal                               : 1
 32-bit comparator lessequal                           : 2
 33-bit comparator greater                             : 1
# Multiplexers                                         : 665
 1-bit 2-to-1 multiplexer                              : 453
 1-bit 3-to-1 multiplexer                              : 10
 1-bit 4-to-1 multiplexer                              : 33
 1-bit 5-to-1 multiplexer                              : 1
 1-bit 7-to-1 multiplexer                              : 32
 1-bit 8-to-1 multiplexer                              : 2
 11-bit 2-to-1 multiplexer                             : 1
 12-bit 2-to-1 multiplexer                             : 4
 15-bit 2-to-1 multiplexer                             : 4
 16-bit 2-to-1 multiplexer                             : 1
 2-bit 2-to-1 multiplexer                              : 3
 22-bit 2-to-1 multiplexer                             : 20
 3-bit 2-to-1 multiplexer                              : 2
 32-bit 2-to-1 multiplexer                             : 44
 32-bit 3-to-1 multiplexer                             : 3
 32-bit 4-to-1 multiplexer                             : 3
 32-bit 6-to-1 multiplexer                             : 1
 32-bit 8-to-1 multiplexer                             : 1
 33-bit 2-to-1 multiplexer                             : 2
 34-bit 2-to-1 multiplexer                             : 1
 36-bit 2-to-1 multiplexer                             : 5
 4-bit 2-to-1 multiplexer                              : 2
 4-bit 3-to-1 multiplexer                              : 1
 5-bit 2-to-1 multiplexer                              : 3
 6-bit 2-to-1 multiplexer                              : 1
 64-bit 2-to-1 multiplexer                             : 1
 7-bit 2-to-1 multiplexer                              : 28
 76-bit 2-to-1 multiplexer                             : 1
 8-bit 2-to-1 multiplexer                              : 1
 8-bit 4-to-1 multiplexer                              : 1
# FSMs                                                 : 3
# Xors                                                 : 6
 1-bit xor10                                           : 1
 1-bit xor2                                            : 3
 1-bit xor9                                            : 1
 32-bit xor2                                           : 1

=========================================================================

=========================================================================
*                         Low Level Synthesis                           *
=========================================================================
WARNING:Xst:1710 - FF/Latch <neorv32_cpu_control_inst/csr_mhpmevent_3_1> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/csr_mhpmevent_2_1> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/csr_mhpmevent_1_1> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/csr_mhpmevent_0_1> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_buf_0> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_buf_3> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_buf_1> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/csr_mtvec_1> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/cnt_event_1> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_ack_0> is unconnected in block <neorv32_cpu>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_ack_3> is unconnected in block <neorv32_cpu>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_ack_1> is unconnected in block <neorv32_cpu>.
WARNING:Xst:1710 - FF/Latch <data_o_6> (without init value) has a constant value of 0 in block <neorv32_wdt>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_o_7> (without init value) has a constant value of 0 in block <neorv32_wdt>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <uart_cts_ff_0> (without init value) has a constant value of 0 in block <neorv32_uart>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <uart_cts_ff_1> (without init value) has a constant value of 0 in block <neorv32_uart>. This FF/Latch will be trimmed during the optimization process.
INFO:Xst:2261 - The FF/Latch <neorv32_cpu_control_inst/trap_ctrl_env_start> in Unit <neorv32_cpu> is equivalent to the following FF/Latch, which will be removed : <neorv32_cpu_control_inst/trap_ctrl_exc_ack> 
WARNING:Xst:1710 - FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_buf_5> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_buf_10> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_buf_8> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_buf_9> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_buf_11> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_buf_12> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_buf_13> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_buf_14> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_buf_17> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_buf_15> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_buf_16> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_buf_18> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_buf_19> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_ack_5> is unconnected in block <neorv32_cpu>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_ack_10> is unconnected in block <neorv32_cpu>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_ack_8> is unconnected in block <neorv32_cpu>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_ack_9> is unconnected in block <neorv32_cpu>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_ack_11> is unconnected in block <neorv32_cpu>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_ack_12> is unconnected in block <neorv32_cpu>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_ack_13> is unconnected in block <neorv32_cpu>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_ack_14> is unconnected in block <neorv32_cpu>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_ack_17> is unconnected in block <neorv32_cpu>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_ack_15> is unconnected in block <neorv32_cpu>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_ack_16> is unconnected in block <neorv32_cpu>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_ack_18> is unconnected in block <neorv32_cpu>.
WARNING:Xst:1898 - Due to constant pushing, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_irq_ack_19> is unconnected in block <neorv32_cpu>.
Analyzing FSM <MFsm> for best encoding.
Optimizing FSM <neorv32_top_inst/neorv32_cpu_inst/FSM_0> on signal <execute_engine_state[1:4]> with user encoding.
--------------------------
 State        | Encoding
--------------------------
 sys_wait     | 0000
 dispatch     | 0001
 trap_enter   | 0010
 trap_exit    | 0011
 trap_execute | 0100
 execute      | 0101
 alu_wait     | 0110
 branch       | 0111
 fence_op     | 1000
 loadstore_0  | 1001
 loadstore_1  | 1010
 loadstore_2  | 1011
 sys_env      | 1100
 csr_access   | 1101
--------------------------
Analyzing FSM <MFsm> for best encoding.
Optimizing FSM <neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_alu_inst/neorv32_cpu_cp_muldiv_inst_true.neorv32_cpu_cp_muldiv_inst/FSM_1> on signal <state[1:3]> with user encoding.
----------------------------
 State          | Encoding
----------------------------
 idle           | 000
 div_preprocess | 001
 processing     | 010
 finalize       | 011
 completed      | 100
----------------------------
Analyzing FSM <MFsm> for best encoding.
Optimizing FSM <neorv32_top_inst/neorv32_busswitch_inst/FSM_2> on signal <arbiter_state[1:3]> with user encoding.
-----------------------------
 State           | Encoding
-----------------------------
 idle            | 000
 busy            | 001
 retire          | 010
 busy_switched   | 011
 retire_switched | 100
-----------------------------
WARNING:Xst:1710 - FF/Latch <neorv32_cpu_control_inst/ctrl_17> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/ctrl_18> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/ctrl_22> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/trap_ctrl_cause_5> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/execute_engine_next_pc_0> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_cpu_control_inst/execute_engine_pc_0> (without init value) has a constant value of 0 in block <neorv32_cpu>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:2677 - Node <neorv32_cpu_control_inst/fetch_engine_pc_0> of sequential type is unconnected in block <neorv32_cpu>.
WARNING:Xst:1710 - FF/Latch <uart_tx_sreg_10> (without init value) has a constant value of 1 in block <neorv32_uart>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_o_13> (without init value) has a constant value of 0 in block <neorv32_uart>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_o_14> (without init value) has a constant value of 0 in block <neorv32_uart>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_o_15> (without init value) has a constant value of 0 in block <neorv32_uart>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_o_16> (without init value) has a constant value of 0 in block <neorv32_uart>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_o_17> (without init value) has a constant value of 0 in block <neorv32_uart>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_o_18> (without init value) has a constant value of 0 in block <neorv32_uart>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_o_19> (without init value) has a constant value of 0 in block <neorv32_uart>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_o_27> (without init value) has a constant value of 0 in block <neorv32_uart>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:2042 - Unit neorv32_top: 2 internal tristates are replaced by logic (pull-up yes): twi_scl_io, twi_sda_io.

Optimizing unit <neorv32_ProcessorTop_Test> ...

Optimizing unit <neorv32_top> ...

Optimizing unit <neorv32_cpu> ...

Optimizing unit <neorv32_cpu_bus> ...
WARNING:Xst:1710 - FF/Latch <i_arbiter_err_align> (without init value) has a constant value of 0 in block <neorv32_cpu_bus>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <i_arbiter_err_align> (without init value) has a constant value of 0 in block <neorv32_cpu_bus>. This FF/Latch will be trimmed during the optimization process.

Optimizing unit <neorv32_fifo> ...

Optimizing unit <neorv32_cpu_decompressor> ...

Optimizing unit <neorv32_cpu_alu> ...

Optimizing unit <neorv32_cpu_cp_shifter> ...

Optimizing unit <neorv32_cpu_cp_muldiv> ...

Optimizing unit <neorv32_busswitch> ...

Optimizing unit <neorv32_bus_keeper> ...

Optimizing unit <neorv32_gpio> ...

Optimizing unit <neorv32_wdt> ...

Optimizing unit <neorv32_mtime> ...

Optimizing unit <neorv32_uart> ...
WARNING:Xst:1710 - FF/Latch <neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/issue_engine_buf_16> (without init value) has a constant value of 0 in block <neorv32_ProcessorTop_Test>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/trap_ctrl_exc_buf_2> (without init value) has a constant value of 0 in block <neorv32_ProcessorTop_Test>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/instr_prefetch_buffer/fifo_data_1_32> (without init value) has a constant value of 0 in block <neorv32_ProcessorTop_Test>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/instr_prefetch_buffer/fifo_data_0_32> (without init value) has a constant value of 0 in block <neorv32_ProcessorTop_Test>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <neorv32_top_inst/neorv32_busswitch_inst/cb_wr_req_buf> (without init value) has a constant value of 0 in block <neorv32_ProcessorTop_Test>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_0> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_1> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_3> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_4> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_2> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_6> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_7> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_5> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_9> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_10> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_8> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_12> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_13> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_11> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_15> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_16> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_14> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_17> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_18> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_19> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_20> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_22> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_23> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_21> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_25> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_26> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_24> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_28> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_29> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_27> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_30> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/mtime_o_31> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/fetch_engine_pc_1> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/ctrl_16> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/ctrl_19> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
WARNING:Xst:2677 - Node <neorv32_top_inst/neorv32_uart0_inst_true.neorv32_uart0_inst/uart_rts_o> of sequential type is unconnected in block <neorv32_ProcessorTop_Test>.
INFO:Xst:2261 - The FF/Latch <neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/csr_mstatus_mpp_1> in Unit <neorv32_ProcessorTop_Test> is equivalent to the following FF/Latch, which will be removed : <neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/csr_mstatus_mpp_0> 
INFO:Xst:2261 - The FF/Latch <neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/csr_privilege_1> in Unit <neorv32_ProcessorTop_Test> is equivalent to the following FF/Latch, which will be removed : <neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/csr_privilege_0> 

Mapping all equations...
Building and optimizing final netlist ...
Found area constraint ratio of 100 (+ 5) on block neorv32_ProcessorTop_Test, actual ratio is 78.
FlipFlop neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_bus_inst/mar_0 has been replicated 1 time(s)
FlipFlop neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_bus_inst/mar_1 has been replicated 1 time(s)
FlipFlop neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine_i_reg_12 has been replicated 1 time(s)
FlipFlop neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine_i_reg_13 has been replicated 1 time(s)
FlipFlop neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine_i_reg_26 has been replicated 1 time(s)
FlipFlop neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine_i_reg_27 has been replicated 1 time(s)
FlipFlop neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/fetch_engine_restart has been replicated 1 time(s)
FlipFlop neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/instr_prefetch_buffer/fifo_r_pnt_0 has been replicated 2 time(s)
FlipFlop neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/issue_engine_align has been replicated 1 time(s)

Final Macro Processing ...

Processing Unit <neorv32_ProcessorTop_Test> :
	Found 3-bit shift register for signal <neorv32_top_inst/neorv32_uart0_inst_true.neorv32_uart0_inst/uart_rx_sync_2>.
INFO:Xst:741 - HDL ADVISOR - A 8-bit shift register was found for signal <neorv32_top_inst/rstn_gen_7> and currently occupies 8 logic cells (4 slices). Removing the set/reset logic would take advantage of SRL32 (and derived) primitives and reduce this to 1 logic cells (1 slices). Evaluate if the set/reset can be removed for this simple shift register. The majority of simple pipeline structures do not need to be set/reset operationally.
Unit <neorv32_ProcessorTop_Test> processed.

=========================================================================
Final Register Report

Macro Statistics
# Registers                                            : 1876
 Flip-Flops                                            : 1876
# Shift Registers                                      : 1
 3-bit shift register                                  : 1

=========================================================================

=========================================================================
*                           Partition Report                            *
=========================================================================

Partition Implementation Status
-------------------------------

  No Partitions were found in this design.

-------------------------------

=========================================================================
*                            Design Summary                             *
=========================================================================

Top Level Output File Name         : neorv32_ProcessorTop_Test.ngc

Primitive and Black Box Usage:
------------------------------
# BELS                             : 5377
#      GND                         : 1
#      INV                         : 114
#      LUT1                        : 401
#      LUT2                        : 192
#      LUT3                        : 661
#      LUT4                        : 466
#      LUT5                        : 720
#      LUT6                        : 1407
#      MUXCY                       : 676
#      MUXF7                       : 105
#      VCC                         : 1
#      XORCY                       : 633
# FlipFlops/Latches                : 1877
#      FD                          : 259
#      FDC                         : 55
#      FDCE                        : 115
#      FDE                         : 1211
#      FDP                         : 7
#      FDPE                        : 30
#      FDR                         : 75
#      FDRE                        : 120
#      FDS                         : 5
# RAMS                             : 519
#      RAM256X1S                   : 512
#      RAMB16BWER                  : 4
#      RAMB8BWER                   : 3
# Shift Registers                  : 1
#      SRLC16E                     : 1
# Clock Buffers                    : 1
#      BUFGP                       : 1
# IO Buffers                       : 11
#      IBUF                        : 2
#      OBUF                        : 9

Device utilization summary:
---------------------------

Selected Device : 6slx9tqg144-3 


Slice Logic Utilization: 
 Number of Slice Registers:            1877  out of  11440    16%  
 Number of Slice LUTs:                 6010  out of   5720   105% (*) 
    Number used as Logic:              3961  out of   5720    69%  
    Number used as Memory:             2049  out of   1440   142% (*) 
       Number used as RAM:             2048
       Number used as SRL:                1

Slice Logic Distribution: 
 Number of LUT Flip Flop pairs used:   6246
   Number with an unused Flip Flop:    4369  out of   6246    69%  
   Number with an unused LUT:           236  out of   6246     3%  
   Number of fully used LUT-FF pairs:  1641  out of   6246    26%  
   Number of unique control sets:       100

IO Utilization: 
 Number of IOs:                          12
 Number of bonded IOBs:                  12  out of    102    11%  

Specific Feature Utilization:
 Number of Block RAM/FIFO:                6  out of     32    18%  
    Number using Block RAM only:          6
 Number of BUFG/BUFGCTRLs:                1  out of     16     6%  

WARNING:Xst:1336 -  (*) More than 100% of Device resources are used

---------------------------
Partition Resource Summary:
---------------------------

  No Partitions were found in this design.

---------------------------


=========================================================================
Timing Report

NOTE: THESE TIMING NUMBERS ARE ONLY A SYNTHESIS ESTIMATE.
      FOR ACCURATE TIMING INFORMATION PLEASE REFER TO THE TRACE REPORT
      GENERATED AFTER PLACE-and-ROUTE.

Clock Information:
------------------
-----------------------------------+------------------------+-------+
Clock Signal                       | Clock buffer(FF name)  | Load  |
-----------------------------------+------------------------+-------+
clk_i                              | BUFGP                  | 2397  |
-----------------------------------+------------------------+-------+

Asynchronous Control Signals Information:
----------------------------------------
No asynchronous control signals found in this design

Timing Summary:
---------------
Speed Grade: -3

   Minimum period: 8.526ns (Maximum Frequency: 117.292MHz)
   Minimum input arrival time before clock: 3.266ns
   Maximum output required time after clock: 3.668ns
   Maximum combinational path delay: No path found

Timing Details:
---------------
All values displayed in nanoseconds (ns)

=========================================================================
Timing constraint: Default period analysis for Clock 'clk_i'
  Clock period: 8.526ns (frequency: 117.292MHz)
  Total number of paths / destination ports: 452028 / 8944
-------------------------------------------------------------------------
Delay:               8.526ns (Levels of Logic = 6)
  Source:            neorv32_top_inst/neorv32_busswitch_inst/arbiter_state_FSM_FFd1 (FF)
  Destination:       neorv32_top_inst/neorv32_wdt_inst_true.neorv32_wdt_inst/ctrl_reg_enable (FF)
  Source Clock:      clk_i rising
  Destination Clock: clk_i rising

  Data Path: neorv32_top_inst/neorv32_busswitch_inst/arbiter_state_FSM_FFd1 to neorv32_top_inst/neorv32_wdt_inst_true.neorv32_wdt_inst/ctrl_reg_enable
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     FDC:C->Q              9   0.447   1.058  neorv32_top_inst/neorv32_busswitch_inst/arbiter_state_FSM_FFd1 (neorv32_top_inst/neorv32_busswitch_inst/arbiter_state_FSM_FFd1)
     LUT3:I0->O            4   0.205   1.028  neorv32_top_inst/neorv32_busswitch_inst/arbiter_state_p_bus_src_o1 (neorv32_top_inst/p_bus_src)
     LUT6:I1->O           18   0.203   1.050  neorv32_top_inst/neorv32_busswitch_inst/Mmux_arbiter_bus_sel1_1 (neorv32_top_inst/neorv32_busswitch_inst/Mmux_arbiter_bus_sel1)
     LUT3:I2->O            3   0.205   1.015  neorv32_top_inst/neorv32_busswitch_inst/Mmux_p_bus_addr_o321_1 (neorv32_top_inst/neorv32_busswitch_inst/Mmux_p_bus_addr_o321)
     LUT6:I0->O            3   0.203   0.651  neorv32_top_inst/io_acc<31>3_SW0_SW0 (N417)
     LUT6:I5->O           11   0.205   0.987  neorv32_top_inst/io_wren_2 (neorv32_top_inst/io_wren_1)
     LUT4:I2->O            6   0.203   0.744  neorv32_top_inst/neorv32_wdt_inst_true.neorv32_wdt_inst/_n0075_inv1 (neorv32_top_inst/neorv32_wdt_inst_true.neorv32_wdt_inst/_n0075_inv)
     FDCE:CE                   0.322          neorv32_top_inst/neorv32_wdt_inst_true.neorv32_wdt_inst/ctrl_reg_lock
    ----------------------------------------
    Total                      8.526ns (1.993ns logic, 6.533ns route)
                                       (23.4% logic, 76.6% route)

=========================================================================
Timing constraint: Default OFFSET IN BEFORE for Clock 'clk_i'
  Total number of paths / destination ports: 10 / 10
-------------------------------------------------------------------------
Offset:              3.266ns (Levels of Logic = 2)
  Source:            rstn_i (PAD)
  Destination:       neorv32_top_inst/rstn_gen_7 (FF)
  Destination Clock: clk_i rising

  Data Path: rstn_i to neorv32_top_inst/rstn_gen_7
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     IBUF:I->O             1   1.222   0.579  rstn_i_IBUF (rstn_i_IBUF)
     INV:I->O              9   0.206   0.829  neorv32_top_inst/rstn_i_inv1_INV_0 (neorv32_top_inst/rstn_i_inv)
     FDC:CLR                   0.430          neorv32_top_inst/sys_rstn
    ----------------------------------------
    Total                      3.266ns (1.858ns logic, 1.408ns route)
                                       (56.9% logic, 43.1% route)

=========================================================================
Timing constraint: Default OFFSET OUT AFTER for Clock 'clk_i'
  Total number of paths / destination ports: 9 / 9
-------------------------------------------------------------------------
Offset:              3.668ns (Levels of Logic = 1)
  Source:            neorv32_top_inst/neorv32_gpio_inst_true.neorv32_gpio_inst/dout_lo_7 (FF)
  Destination:       gpio_o<7> (PAD)
  Source Clock:      clk_i rising

  Data Path: neorv32_top_inst/neorv32_gpio_inst_true.neorv32_gpio_inst/dout_lo_7 to gpio_o<7>
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     FDE:C->Q              3   0.447   0.650  neorv32_top_inst/neorv32_gpio_inst_true.neorv32_gpio_inst/dout_lo_7 (neorv32_top_inst/neorv32_gpio_inst_true.neorv32_gpio_inst/dout_lo_7)
     OBUF:I->O                 2.571          gpio_o_7_OBUF (gpio_o<7>)
    ----------------------------------------
    Total                      3.668ns (3.018ns logic, 0.650ns route)
                                       (82.3% logic, 17.7% route)

=========================================================================

Cross Clock Domains Report:
--------------------------

Clock to Setup on destination clock clk_i
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
clk_i          |    8.526|         |         |         |
---------------+---------+---------+---------+---------+

=========================================================================


Total REAL time to Xst completion: 35.00 secs
Total CPU time to Xst completion: 34.93 secs
 
--> 

Total memory usage is 4623924 kilobytes

Number of errors   :    0 (   0 filtered)
Number of warnings :  385 (   0 filtered)
Number of infos    :   57 (   0 filtered)

from neorv32.

stnolting commented on May 4, 2024

That's interesting.

Synthesizing (advanced) Unit <neorv32_dmem>.
INFO:Xst:3218 - HDL ADVISOR - The RAM <Mram_mem_ram_b0> will be implemented on LUTs either because you have described an asynchronous read or because of currently unsupported block RAM features. If you have described an asynchronous read, making it synchronous would allow you to take advantage of available block RAM resources, for optimized device usage and improved timings. Please refer to your documentation for coding guidelines.

Seems like ISE has problems to map the BRAM's read- and write-enable signals. This is caused by the memory VHDL description, which implicitly eliminates the read-during-write behavior question (as there cannot be any read-during-write; it's either read or write).

The Spartan-6 BRAM primitives are not really different to the Series-7 ones. Vivado has no problems identifying the current DMEM description, so it seems to be an ISE issue. However, you could try using a different description for the DMEM (this is related to #101). For example, you could try the attached version of the DMEM:

neorv32_dmem.vhd.TXT

Remove the .TXT suffix and replace the original DMEM file rtl/core/neorv32_dmem.vhd by this one. Then try another synthesis. The DMEM should be mapped to BRAM now (hopefully). If this works, then the same code modifications can be done for the IMEM.

from neorv32.

umarcor commented on May 4, 2024

@Alirio926, this is just a friendly suggestion: you can change the extension of your logs/reports to .txt and then "drag & drop" the file into your comments in these issues. That will "upload" the file and show it as a link (see @stnolting's previous message). It makes easier for other users to grab them, without scrolling down all the issue.

from neorv32.

stnolting commented on May 4, 2024

Hello, sorry abou delay to test.

No worries 😉

Follow the new Syntetize detailled Report.
Syntetize report dmem8k + imem8k.txt

According to your report, both IMEM and DMEM are mapped to block-RAM 👍
But I am not sure here - which memory VHDL description for IMEM & DMEM did you use?

neorv32_imem .vhd.txt

Cut-out from your file:

  -- read data --
  rdata <= mem_b3_rd & mem_b2_rd & mem_b1_rd & mem_b0_rd;
  -- output gate --
  data_o <= rdata when (rden = '1') else (others => '0');

⚠️ This will work if the IMEM is implemented as RAM (top generic INT_BOOTLOADER_EN => true). But it will not work if the IMEM is implemented as ROM (top generic INT_BOOTLOADER_EN => false) as the read-data from the ROM-process ("imem_rom") is missing.

from neorv32.

Cannot fit on XC6SLX9 about neorv32 HOT 10 CLOSED

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