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emb4fun avatar emb4fun commented on May 5, 2024 2

Yes, the NEORV32 also runs on a Cyclone II. An example for an Altera DE1 board can be found here:

https://github.com/emb4fun/neorv32-examples

Take a look for de1-neorv32-sdram-qsys. This is a simple example using on-chip RAM as memory
for IMEM and DMEM. In addition, there is the SDRAM which can be addressed by the Wishbone to
Avalon Master in the Qsys area.

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ralphnguyen86 avatar ralphnguyen86 commented on May 5, 2024 1

@stnolting thank you very much.

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stnolting avatar stnolting commented on May 5, 2024

Yes, that should be no problem.

The NEORV32 is written is platform-independent VHDL to be supported by any FPGA. The only constraint is the amount of available logic resources. But in terms of the DE2 board your FPGA provides more than enough resources.

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stnolting avatar stnolting commented on May 5, 2024

Older versions of Quartus (that still support Cyclone II) have problems with inferring block RAM from the default memory descriptions (see #197). We have added alternative memory components in rtl/core/mem that work with these legacy Quartus versions (see #198).

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stnolting avatar stnolting commented on May 5, 2024

@ralphnguyen86
I think this can be closed, right?

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