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Wallace and Dadda tree multiplier generator in vhdl and verilog

License: Apache License 2.0

Makefile 1.62% Shell 22.54% C++ 36.48% VHDL 28.46% SystemVerilog 10.90%
wallace-tree-multiplier dadda-tree-multiplier code-generator hardware

mult-tree's Issues

Verilator Error

Verilator gives following error ,

/usr/local/share/verilator/include/verilated_timing.h:51:11: fatal error: coroutine: No such file or directory 51 | # include <coroutine>

Is this related my WSL or do I need to use ubuntu instead of WSL.

My last question there are two output Z0 and Z1 in generated top module which one is the result?
I guest one of them low and one of them high part?

@taneroksuz

Question about using verilator!

Hello, thankyou for your amazing work.

I'm currently trying to use your verilog code generator for wallace tree and dadda tree.

However, I'm now in problem with installing requirements.

So far, I finished to run ghdl.sh and verilator.sh...however, I don't have any idea what to do from now on. Can you tell me about details for me to run your generator successfully? Thank you.

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