thethirdone/rars

RARS -- RISC-V Assembler and Runtime Simulator

RARS -- RISC-V Assembler and Runtime Simulator

RARS, the RISC-V Assembler, Simulator, and Runtime, will assemble and simulate the execution of RISC-V assembly language programs. Its primary goal is to be an effective development environment for people getting started with RISC-V.

Features

• RISC-V IMFDN Base (riscv32 and riscv64)
• Several system calls that match behaviour from MARS or SPIKE.
• Support for debugging using breakpoints and/or ebreak
• Side by side comparison from pseudo-instruction to machine code with intermediate steps
• Multifile assembly using either files open or a directory

Documentation

Documentation for supported instructions, system calls, assembler directives and more can be found on the wiki. Documentation included in the download can be accessed via the help menu.

Download

RARS is distributed as an executable jar. You will need at least Java 8 to run it.

The latest stable release can be found here, a release with the latest developments can be found on the continuous release, and the releases page contains all previous stable releases with patch notes.

Alternatively, if you wish to make your own jar and/or modify the code, you should clone the repo with git clone https://github.com/TheThirdOne/rars --recursive. Running the script ./build-jar.sh on a Unix system will build rars.jar.

Screenshot

Changes from MARS 4.5

RARS was built on MARS 4.5 and owes a lot to the development of MARS; its important to note what are new developments and what come straight from MARS. Besides moving from supporting MIPS to RISC-V and the associated small changes, there are several general changes worth noting.

• Instructions can now be hot-loaded like Tools. If you want to support an additional extension to the RISC-V instruction set. the .class files just need to be added to the right folder
• ScreenMagnifier, MARS Bot, Intro to Tools, Scavenger Hunt, and MARS Xray were removed from the included tools. ScreenMagnifier, MARS Bot, Intro to Tools, and Scavenger Hunt were removed because they provide little benefit. And MARS Xray was removed because it is not set up to work with RISC-V, however if someone ports it, it could be merged in.
• Removed delayed branching
• Removed the print feature
• Added a testing framework to verify compatibility with the RISC-V specification
• Significant internal restructuring and refactoring.

rars's Issues

-0x800 stopped being valid since release 1.2

In #5, @rmnattas mentioned that there was a change from May 1st and the current release. I have confirmed that since 1.2 something changed.

Floating point issues

There are a fair number of related bugs with floating point support, so I'll group them all together here. Pretty much all of these could be solved with a IEEE 754-2008 compliant library (but I don't think that exists).

• The inexact flag is almost never set correctly. This could potentially be solved by using doubles to check the accuracy.
• Signalling vs Non-Signalling NaN behaviour in a few cases is not correct.
• Min and Max don't handle NaNs correctly.
• Classify likely has a few bugs
• Rounding mode is not used. It could be used in conversions, but in general computation it can't be specified due to limitations of Java.
• There are likely a few more issues, but these are the ones I am currently aware of.

Error running code

Following code:

.data
  hello: .string "Hello world"

.text
  # prints message
  li a0, 4
  la a1, hello
  ecall

When Assembled (F3) followed by Go (F5), I get:-

Error in ....asm line 8: Runtime exception at 0x0040000c: invalid or unimplemented syscall service: 0 

Go: execution terminated with errors.

GCC compatability

I would like for GCC generated assembly to be able to be directly compiled (with libc features replaced). A fair number of small features need to be added to make that possible.

• .section .rodata should not have no effect
  • put it in .data at least
  • maybe add a .rodata section
• Allow .align n in .text
  • should work properly with n >= 4
  • n < 4 can just be made into n = 4
• Allow .type
  • probably just ignore it for now
• Extra psuedo-instructions
  • add sp,sp, -32
  • lui a5, %hi(.LC0)
  • addi a0,a5,%lo(.LC0)
  • jr ra

Deadlock in UI

I have the problem, that when I'm debugging programs with single stepping, often the UI freezes. I use oracle Java 8 on Windows 10 with 64 bit.

The problem seems to be, that when a jump occures and the text segment window needs to be updated, it fairly often happens. An example program is:

.text
	jal L2
loop:	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	jal loop
L2:	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1	
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
L1:	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	addi t0,t0,1
	
	bne t0,zero,loop

Sorry, maybe it could be smaller, it is important, that the text segment window need to scroll.
To trigger the problem you need to single step through the program. It runs fine with normal execution.

I have no full java develpoment environment available, but I connected jvisualvm, an got the following output of a thread dump:

Found one Java-level deadlock:
=============================
"RISCV":
  waiting to lock monitor 0x000000001f628458 (object 0x00000006c28ef1f0, a java.awt.Component$AWTTreeLock),
  which is held by "AWT-EventQueue-0"
"AWT-EventQueue-0":
  waiting to lock monitor 0x000000001f6283a8 (object 0x00000006c3711778, a javax.swing.plaf.metal.MetalCheckBoxUI),
  which is held by "RISCV"

Java stack information for the threads listed above:
===================================================
"RISCV":
        at javax.swing.plaf.metal.MetalUtils$GradientPainter.paint(Unknown Source)
        - waiting to lock <0x00000006c28ef1f0> (a java.awt.Component$AWTTreeLock)
        at javax.swing.plaf.metal.MetalUtils.drawGradient(Unknown Source)
        at javax.swing.plaf.metal.MetalIconFactory$CheckBoxIcon.paintOceanIcon(Unknown Source)
        at javax.swing.plaf.metal.MetalIconFactory$CheckBoxIcon.paintIcon(Unknown Source)
        at javax.swing.plaf.metal.MetalRadioButtonUI.paint(Unknown Source)
        - locked <0x00000006c3711778> (a javax.swing.plaf.metal.MetalCheckBoxUI)
        at javax.swing.plaf.ComponentUI.update(Unknown Source)
        at javax.swing.JComponent.paintComponent(Unknown Source)
        at javax.swing.JComponent.paint(Unknown Source)
        at javax.swing.CellRendererPane.paintComponent(Unknown Source)
        at javax.swing.plaf.basic.BasicTableUI.paintCell(Unknown Source)
        at javax.swing.plaf.basic.BasicTableUI.paintCells(Unknown Source)
        at javax.swing.plaf.basic.BasicTableUI.paint(Unknown Source)
        at javax.swing.plaf.ComponentUI.update(Unknown Source)
        at javax.swing.JComponent.paintComponent(Unknown Source)
        at javax.swing.JComponent.paint(Unknown Source)
        at javax.swing.JComponent.paintToOffscreen(Unknown Source)
        at javax.swing.RepaintManager$PaintManager.paintDoubleBuffered(Unknown Source)
        at javax.swing.RepaintManager$PaintManager.paint(Unknown Source)
        at javax.swing.RepaintManager.paint(Unknown Source)
        at javax.swing.JComponent.paintForceDoubleBuffered(Unknown Source)
        at javax.swing.JViewport.paintView(Unknown Source)
        at javax.swing.JViewport.windowBlitPaint(Unknown Source)
        at javax.swing.JViewport.setViewPosition(Unknown Source)
        at javax.swing.JViewport.scrollRectToVisible(Unknown Source)
        at javax.swing.JComponent.scrollRectToVisible(Unknown Source)
        at rars.venus.TextSegmentWindow.highlightStepAtAddress(TextSegmentWindow.java:508)
        at rars.venus.TextSegmentWindow.highlightStepAtPC(TextSegmentWindow.java:488)
        at rars.venus.run.RunStepAction.stepped(RunStepAction.java:104)
        at rars.venus.run.RunStepAction$1.update(RunStepAction.java:83)
        at java.util.Observable.notifyObservers(Unknown Source)
        at rars.simulator.Simulator.notifyObserversOfExecution(Simulator.java:184)
        at rars.simulator.Simulator.access$500(Simulator.java:51)
        at rars.simulator.Simulator$SimThread.stopExecution(Simulator.java:244)
        at rars.simulator.Simulator$SimThread.run(Simulator.java:441)
        - locked <0x00000006c28116a8> (a java.lang.Object)
        at java.lang.Thread.run(Unknown Source)
"AWT-EventQueue-0":
        at javax.swing.plaf.metal.MetalRadioButtonUI.paint(Unknown Source)
        - waiting to lock <0x00000006c3711778> (a javax.swing.plaf.metal.MetalCheckBoxUI)
        at javax.swing.plaf.ComponentUI.update(Unknown Source)
        at javax.swing.JComponent.paintComponent(Unknown Source)
        at javax.swing.JComponent.paint(Unknown Source)
        at javax.swing.CellRendererPane.paintComponent(Unknown Source)
        at javax.swing.plaf.basic.BasicTableUI.paintCell(Unknown Source)
        at javax.swing.plaf.basic.BasicTableUI.paintCells(Unknown Source)
        at javax.swing.plaf.basic.BasicTableUI.paint(Unknown Source)
        at javax.swing.plaf.ComponentUI.update(Unknown Source)
        at javax.swing.JComponent.paintComponent(Unknown Source)
        at javax.swing.JComponent.paint(Unknown Source)
        at javax.swing.JComponent.paintChildren(Unknown Source)
        - locked <0x00000006c28ef1f0> (a java.awt.Component$AWTTreeLock)
        at javax.swing.JComponent.paint(Unknown Source)
        at javax.swing.JViewport.paint(Unknown Source)
        at javax.swing.JComponent.paintChildren(Unknown Source)
        - locked <0x00000006c28ef1f0> (a java.awt.Component$AWTTreeLock)
        at javax.swing.JComponent.paint(Unknown Source)
        at javax.swing.JComponent.paintToOffscreen(Unknown Source)
        at javax.swing.RepaintManager$PaintManager.paintDoubleBuffered(Unknown Source)
        at javax.swing.RepaintManager$PaintManager.paint(Unknown Source)
        at javax.swing.RepaintManager.paint(Unknown Source)
        at javax.swing.JComponent._paintImmediately(Unknown Source)
        at javax.swing.JComponent.paintImmediately(Unknown Source)
        at javax.swing.RepaintManager$4.run(Unknown Source)
        at javax.swing.RepaintManager$4.run(Unknown Source)
        at java.security.AccessController.doPrivileged(Native Method)
        at java.security.ProtectionDomain$JavaSecurityAccessImpl.doIntersectionPrivilege(Unknown Source)
        at javax.swing.RepaintManager.paintDirtyRegions(Unknown Source)
        at javax.swing.RepaintManager.paintDirtyRegions(Unknown Source)
        at javax.swing.RepaintManager.prePaintDirtyRegions(Unknown Source)
        at javax.swing.RepaintManager.access$1200(Unknown Source)
        at javax.swing.RepaintManager$ProcessingRunnable.run(Unknown Source)
        at java.awt.event.InvocationEvent.dispatch(Unknown Source)
        at java.awt.EventQueue.dispatchEventImpl(Unknown Source)
        at java.awt.EventQueue.access$500(Unknown Source)
        at java.awt.EventQueue$3.run(Unknown Source)
        at java.awt.EventQueue$3.run(Unknown Source)
        at java.security.AccessController.doPrivileged(Native Method)
        at java.security.ProtectionDomain$JavaSecurityAccessImpl.doIntersectionPrivilege(Unknown Source)
        at java.awt.EventQueue.dispatchEvent(Unknown Source)
        at java.awt.EventDispatchThread.pumpOneEventForFilters(Unknown Source)
        at java.awt.EventDispatchThread.pumpEventsForFilter(Unknown Source)
        at java.awt.EventDispatchThread.pumpEventsForHierarchy(Unknown Source)
        at java.awt.EventDispatchThread.pumpEvents(Unknown Source)
        at java.awt.EventDispatchThread.pumpEvents(Unknown Source)
        at java.awt.EventDispatchThread.run(Unknown Source)

Found 1 deadlock.

Hopefully, you can fix this. If you need further information, let me know.

URET or ERET

In the help section of rars where the basic instructions are listed, there is an entry for URET but I can't find that instruction in the RISC-V spec. There is an ERET instruction. Is this a typo in the rars entry or is URET a new instruction that hasn't been included in documentation yet? Just would like clarification.

Display in the Keyboard and MMIO simulator tool

So i am trying to print a sting onto the Display in the Keyboard and MMIO simulator tool but it seems to be crashing rars for me every single time right after it the ascii of the first character into the memory and the delay is finised

this is the code im trying to run with the tool:
riscv1.txt

this is the error:

Exception in thread "RISCV" java.lang.NullPointerException
at rars.tools.KeyboardAndDisplaySimulator$2.caretUpdate(KeyboardAndDisplaySimulator.java:596)
at java.desktop/javax.swing.text.JTextComponent.fireCaretUpdate(JTextComponent.java:412)
at java.desktop/javax.swing.text.JTextComponent$MutableCaretEvent.fire(JTextComponent.java:4489)
at java.desktop/javax.swing.text.JTextComponent$MutableCaretEvent.stateChanged(JTextComponent.java:4511)
at java.desktop/javax.swing.text.DefaultCaret.fireStateChanged(DefaultCaret.java:812)
at java.desktop/javax.swing.text.DefaultCaret.changeCaretPosition(DefaultCaret.java:1283)
at java.desktop/javax.swing.text.DefaultCaret.handleSetDot(DefaultCaret.java:1182)
at java.desktop/javax.swing.text.DefaultCaret.setDot(DefaultCaret.java:1163)
at java.desktop/javax.swing.text.DefaultCaret$Handler.insertUpdate(DefaultCaret.java:1757)
at java.desktop/javax.swing.text.AbstractDocument.fireInsertUpdate(AbstractDocument.java:203)
at java.desktop/javax.swing.text.AbstractDocument.handleInsertString(AbstractDocument.java:757)
at java.desktop/javax.swing.text.AbstractDocument.insertString(AbstractDocument.java:716)
at java.desktop/javax.swing.text.PlainDocument.insertString(PlainDocument.java:131)
at java.desktop/javax.swing.JTextArea.append(JTextArea.java:468)
at rars.tools.KeyboardAndDisplaySimulator.displayCharacter(KeyboardAndDisplaySimulator.java:336)
at rars.tools.KeyboardAndDisplaySimulator.processRISCVUpdate(KeyboardAndDisplaySimulator.java:267)
at rars.tools.AbstractToolAndApplication.update(AbstractToolAndApplication.java:480)
at java.base/java.util.Observable.notifyObservers(Observable.java:173)
at rars.riscv.hardware.Memory$MemoryObservable.notifyObserver(Memory.java:1026)
at rars.riscv.hardware.Memory.notifyAnyObservers(Memory.java:1056)
at rars.riscv.hardware.Memory.readProgramStatement(Memory.java:1247)
at rars.riscv.hardware.Memory.getStatement(Memory.java:808)
at rars.riscv.hardware.Memory.getStatement(Memory.java:779)
at rars.simulator.Simulator$SimThread.run(Simulator.java:450)
at java.base/java.lang.Thread.run(Thread.java:834)

Control and Status Register issues

There are a few issues with the control and status register implementation. All of these are solvable, but there is a little awkwardness involved with each.

• CSRs are only accessible by number in the instruction set. This can be fixed with gratuitous psuedo-ops or defining a new type of register token that can be a number or a name.
• CSRs can not have read only sections. Many CSRs such as uip have bits which cannot be modified (but change value in hardware). The adding read only stuff should be pretty easy, but also making it so it updates properly is where some awkwardness comes in.
• RDCYCLE[H], RDTIME[H], RDINSTRET[H] don't exist. RDCYCLE AND RDINSTRET should be easy to implement given the above issue is done. RDTIME is a bit more problematic, because it is not clear if it should always be updating or not. It shouldn't be a big issue though; these should not be commonly used.

Dump un-runnable source file using the command line

When dumping a source file in the command line using java -jar rars.jar risc-test.s dump .text Binary risc-text.bin, you get the error Error in : Instruction load access error when the source file is not runnable alone (the source file is just a procedure that ends with a ret or jalr zero,ra,0).
Also, when the file causes an infinite loop the dump command also gets to an infinite loop.
But in both cases using the File -> Dump Memory in the GUI works.

This does not work in the command line:

.text
Add:
	add 	a0,a0,a1
	jalr	zero,ra,0

But this work:

.text
Add:
	add 	a0,a0,a1

CSR Registers access error

Hi,
The program

.text
csrrs t0, 3072, x0 # trying to read CSR cycle register

causes: Error in riscv1.asm line 2 column 10: "3072": operand is out of range
The same for read instret, cycleh, and instreth registers.

[]
Marcus Vinicius

[Feature Request] Special start label

In SPIM (an emulator for MIPS), main label is special as it is called first. Is there any similar thing here?

Find and Replace Does nothing

@mvlamar informed me that find and replace had a bug in it.

After a quick look this, I found an issue introduced by 602dc3d.

Pseudo-instruction JR

In page 110 of the RISC-V Specifications the format for the pseudo-instruction jr is jr rs.

When I used jr ra in RARS I got the following error:
Too few or incorrectly formatted operands. Expected: jr t0, -100

I think keeping the format jr t0, -100 would be beneficial but also supporting the official one is important.

Where does RARS handle pseudo-instruction in the source code?

UI becomes unresponsive when close Bitmap display while running the program

A good solution for this problem is: When click to close the bitmap display , first stop the program that are running, after this close bitmap display

Error of invalid or unimplemented syscall service: 0

Hello, please help me!!!

This example only print number but wrong is invalid or unimplemented syscall service: 0

Risc V, Mips:
print integer is (1)
read integer is (5)

Symbolic name "fp" not recognised

RISC-V registers are named x0, x1, ..., x31. RISC-V assembly has various symbolic names for those, such as

• ra for return address
• sp for stack pointer
• t0, ..., t6 for temporaries

etc. The symbolic name fp for frame pointer (which you find in some RISCV assembly descriptions) is not recognised. When using in e.g. lw a0, 4(fp) a

  "fp": operand is of incorrect type

is returned. I don't know if this is a bug or not.

Native executable with JDK 9

JDK version 9 introduces modules which enables packaging applications with a JRE more feasible.

This is mostly a tracking issue; I am not planning to add this immediately.

More information

Also, it might be an interesting idea to try to make something which takes executable jars and use package them with this automatically.

Blue screen after executing my code

OS : MAC Mojave 10.14.4
JAVA version : "11.0.1" 2018-10-16 LTS

I got a blue screen after running my code :

RARS 'loosing' some of its RISC-V commands in certain circumstances

My compiler students report a strange problem with RARS. I'm almost certain that this is a problem in our labs, but it's sufficiently surprising that you may be interested in it, at least it shows that RARS is not robust under a certain kind of failure (we never had this problem with MARS). The problem is this: When downloading RARS to the Windows machines in out lab:

• RARS runs fine from the C drive directories.
• If RARS is moved onto the N drive (which is most common to students, as this is where their documents and desktop are stored- so they can be accessed by any of the labs) it no longer functions properly. The jar file still opens but has a reduced instruction set!

Compare the following:

• Instruction set when typing beq when opened from the C drive, see [1].
• Instruction set when opened from the N drive, see [2]. As you can see the instruction beq is missing! When trying to run this function the error [3] appears. When using instructions it does recognise and assembling the code, it never moves onto the next screen so that it can be run, however it is also not frozen as the output box can be cleared and new instructions typed. Basically it doesn't run any of the functionality it is meant to have. Note the code can be saved in the N file the only thing that makes a difference is where the .jar file is located. Maybe RARS tries to load some classes/libraries that it cannot access but it fails silently.

Note: this problem only occurs on the Windows machines in our lab, not on personal Macs, Linux and Windows machines, where it runs without issue.

1. http://users.sussex.ac.uk/~mfb21/compilers/rars1.png
2. http://users.sussex.ac.uk/~mfb21/compilers/rars2.png
3. http://users.sussex.ac.uk/~mfb21/compilers/rars3.png

Documentation of syscalls

There doesn't seem to be a comprehensive overview of available syscalls. The file help/SyscallHelpPrelude.html promises a "Table of Available Services", but then doesn't list them.

Symbol "printStr" not found in symbol table

No matter wether I execute the rars.jar on Fedora Linux or on Windows 10: I can not assemble any example code since the system calls aren't working. Mb I am doing something wrong?

Windows:
Error in .......printf.s line 64 column 7: Symbol "printStr" not found in symbol table.
Error in ....bottles.s line 24 column 17: Symbol "printf" not found in symbol table.

API for running RARS from the command line

It would be nice to have an API that makes it possible to run RARS within other programs. Maybe a method with a signature like so:

 run :: String -> RISC_V_State

Here the input string is the RISC-V assembly. The type RISC_V_State can be given in various ways. Minimally, the state should provide something along the lines of:

• Error or successful-completion
• Content of registers (in fact content of one register should be fine as long as that register can be used as an accumulator).

Clearly all this is available internally already, so it'd just be a matter of creating a suitable API.

JAL instruction has incorrectly restricted immediate

The RISC-V JAL instruction has a 20 bit immediate, and is subject to the error: "Jump target word address beyond 12-bit range.", which appears to be an incorrect limit.

Either this instruction is incorrectly encoded as J_FORMAT and should be U_FORMAT instead --or-- the J_FORMAT displacement is incorrectly modeled as a 12-bit immediate rather than 20-bit immediate. (NOTE that according to the spec (as of 2.0) the JAL instruction was changed from J-Type to U-Type.)

lbu data alignment bug

Hi,
The lbu instruction stops with the error: "Load address not aligned on halfword boundary" when reading from a not halfword aligned address.
The lb and sb instructions are Ok.

m.v.

cannot execute binary file: Exec format error

Hi. Does anyone know what is the problem?
I have made the rars1_3_1.jar executable:
chmod a+x rars1_3_1.jar

I installed:
sudo apt-get install default-jdk
java -version
openjdk version "11.0.5" 2019-10-15
OpenJDK Runtime Environment (build 11.0.5+10-post-Debian-1deb10u1)
OpenJDK 64-Bit Server VM (build 11.0.5+10-post-Debian-1deb10u1, mixed mode, sharing)

I checked:
sudo update-alternatives --config java
[sudo] password for edu:
There is only one alternative in link group java (providing /usr/bin/java): /usr/lib/jvm/java-11-openjdk-amd64/bin/java
Nothing to configure.

Please help. I need rars because I'm following a riscv on openFPGA tutorial.
thanks.

Parse labels as compatible with integer offsets

Currently statements like beq x0, x0, 90 are not allowed; ideally they should be.

Additionally, this would allow it to share size checking code with integers.

#19 could have been prevented if this was implemented. Implementing things like %hi as in #16 would probably also be easier with this in place properly.

I tried implementing a version of this using a LAB and psuedo-instructions to convert all labels to ints, but that lead to issues with error reporting similar to template issues in c++.

ReadString syscall not documented

The ReadString syscall is fully working but the documentation in the syscall table say it is not available

I've tested this service and it works perfectly

auipc issue

Please, just confirm that in Rars
auipc t0,imm
is loading t0 = PC+4 + Imm<<12 instead t0 =PC + Imm<<12
I tried to fix it in the definition file AUIPC.java but I suppose the problem is a little bit deeper, right?

By the way, congratulations for this project! That is just what we were waiting for adopt RISC-V in our undergraduate courses(UnB)! So, maybe from now you will receive a lot of suggestions... :)

rars.jar bugs

The rars.jar available at https://github.com/TheThirdOne/rars/releases
has a bug @func3 of BLTU, BGE, and BGEU
Apparently it has been corrected in the source but not the release.

Is it possible to release a new rars.jar ?

rdcycle rdtime rdinstret pseudo-instructions's bug

Hi,
I think the PseudoOps.txt has a bug in the instructions below, where rd register should be replaced by RG1 register, according to:

rdcycle t1 ; csrrs RG1, 0xC00, x0 ;# Read from cycle
rdtime t1 ; csrrs RG1, 0xC01, x0 ;# Read from time
rdinstret t1 ; csrrs RG1, 0xC02, x0 ;# Read from instret
rdcycleh t1 ; csrrs RG1, 0xC80, x0 ;# Read from cycleh
rdtimeh t1 ; csrrs RG1, 0xC81, x0 ;# Read from timeh
rdinstreth t1 ; csrrs RG1, 0xC82, x0 ;# Read from instreth

[]
Marcus Vinicius

Exception handling issues

User-mode exception handling does not completely conform with the specification. It has several bugs.

• The interrupt controller cannot handle being stepped backwards. This could be as simple as defining a new back stepper action and threading it in. However, its not quite clear what the behavior should be after back-stepping; what should happen to external devices that are communicating with it?
• WFI doesn't quite work correctly; while waiting, if the step button or the run button is pressed you can get two instances running at the same time. This can also happen if you click too fast, but it is very noticeable with WFI. A temporary solution is to just make WFI a nop as that conforms to the specification. Alternatively, making stepping interrupt the wait would also work.
• URET doesn't reset all of the state it should. Specifically, it does not follow "Execution of URET will place the uepc, ucause, and utval back into initial state."
• And likely more.

Integration support with IDE, please

Normally I program in C# with the monodevelop IDE, I have also worked with the IDE netbeans, something basic, it took me a while to create the project in netbeans and execute it.
Which IDE do you use for the development of RARS? Would it be possible in the future to support an IDE to make everything simpler? open the IDE, go to the RARS folder, load the project and everything is ready.
Thanks for the project ... it's great!

Immediate Out of Range Bug

Hi,
I switched from MARS to RARS in my lecture and I got the following error:
in Mars it was totally okay to use to big immediates, which will automatically converted to a LUI and ORI,

e.g. ori $t0,$t0,0x80000000

but in RARS that generates an error.

If I try to manually use lui, I even get the error that the operand is out of range:

lui t0,t0,0x80000

strangly enough, when I use decimal numbers like

ori t0,t0,-1

it works without problems and even do not use an additional lui to assemble the code.

Generate Trap for a custom Exception Handler (Solved)

Sorry, I found the solution by looking the exemple files in the RARS/test directory. The issue can be closed.

RV64IMFD support

Hi, I'm using RARS for teaching scope starting from this year and I would like to know if you are thinking to introduce the support for the RV64I, RV64M, RV64F, and RV64D in the next future.

Improving the Bitmap Display tool

I was wondering if you would accept a change made to the Bitmap Display tool, where you will also have the option of choosing to use a custom Base Address, instead of just the 5 predefined base addresses. I was hoping to make it so that this custom base address is an address you can set anywhere in the heap. I want to do this as i am currently facing a problem where i am trying to dynamically allocate space using the sbrk syscall to an array after taking in some inputs to determine the size of the array. The sbrk syscall allocates space into the heap starting at the base address of the heap 0x1004000. This array however causes a conflict with the Bitmap display tool (which i am using simultaneously with it) as I am also using the heap address space for it. I cant use any of the other address spaces as either they are being used for something else or they are simply not large enough. Therefore i would like to add the custom base address option to the tool so that i can set the base address to a part where i know there will be no conflicts with the array. Also if you think there is an alternate way to do this without changing the tool, please let me know.

Better documentation

As it stands, documentation isn't that accessible. You have to open the help menu after downloading and running RARS. Having a website or wiki filled out with some of the basic information would be good.

This doesn't have to be automatic via travis, but that would probably be a bonus. Even if is a one time by hand addition, that would be a large step in the right direction.

Additionally, adding some more examples and making a getting started hello world tutorial would help get people past the initial difficulty of using rars.

Store Byte with Bitmap display

I found an problem working accessing bytes to color bitmap display:

.data
init:		.word	0x10040000
.text
main:
	lw	t0, init 	# Heap adress
	li	t1, 0x00ff0000	# Red point to t1
	sw	t1, 0(t0)	# Paint the first dot with red
	addi	t0, t0, 4	# Jump 4 bytes
	
	li	t2, 0xff	
	sb	t2, 2(t0)	# Paint the second dot with red

In this code i am trying to color two points with red. For the first dot, i use SW and works fine, but when i try to use SB to the second dot, in the display appears that the point is Blue.
Display Config:

Result:

The memory is right:

Improve InstructionCounter and InstructionStatistics

InstructionCounter could be updated to also have counts for B and J. This would require copying some extra UI elements, adding some state to track counts and changing this if. This would only require understanding the code in InstructionCounter.

rars/rars/tools/InstructionCounter.java

Lines 225 to 237 in 9ff2b88

	// TODO: update this to have labels for the extra formats
	try {
	ProgramStatement stmt = Memory.getInstance().getStatement(a);
	BasicInstruction instr = (BasicInstruction) stmt.getInstruction();
	BasicInstructionFormat format = instr.getInstructionFormat();
	if (format == BasicInstructionFormat.R_FORMAT)
	counterR++;
	else if (format == BasicInstructionFormat.I_FORMAT)
	counterI++;
	else if (format == BasicInstructionFormat.S_FORMAT || format == BasicInstructionFormat.B_FORMAT)
	counterS++;
	else if (format == BasicInstructionFormat.U_FORMAT || format == BasicInstructionFormat.J_FORMAT)
	counterU++;

InstructionStatistics is was never updated from MIPS. Updating this requires more work that InstructionCounter. You will need to update getInstructionCategory(...); that will probably involve a fair amount of instanceof checks. This requires understanding code in rars.riscv.instructions.

rars/rars/tools/InstructionStatistics.java

Lines 238 to 274 in 4b2d4b6

	protected int getInstructionCategory(ProgramStatement stmt) {
	int opCode = stmt.getBinaryStatement() >>> (32 - 6);
	int funct = stmt.getBinaryStatement() & 0x1F;
	if (opCode == 0x00) {
	if (funct == 0x00)
	return InstructionStatistics.CATEGORY_ALU; // sll
	if (0x02 <= funct && funct <= 0x07)
	return InstructionStatistics.CATEGORY_ALU; // srl, sra, sllv, srlv, srav
	if (funct == 0x08 || funct == 0x09)
	return InstructionStatistics.CATEGORY_JUMP; // jr, jalr
	if (0x10 <= funct && funct <= 0x2F)
	return InstructionStatistics.CATEGORY_ALU; // mfhi, mthi, mflo, mtlo, mult, multu, div, divu, add, addu, sub, subu, and, or, xor, nor, slt, sltu
	return InstructionStatistics.CATEGORY_OTHER;
	}
	if (opCode == 0x01) {
	if (0x00 <= funct && funct <= 0x07)
	return InstructionStatistics.CATEGORY_BRANCH; // bltz, bgez, bltzl, bgezl
	if (0x10 <= funct && funct <= 0x13)
	return InstructionStatistics.CATEGORY_BRANCH; // bltzal, bgezal, bltzall, bgczall
	return InstructionStatistics.CATEGORY_OTHER;
	}
	if (opCode == 0x02 || opCode == 0x03)
	return InstructionStatistics.CATEGORY_JUMP; // j, jal
	if (0x04 <= opCode && opCode <= 0x07)
	return InstructionStatistics.CATEGORY_BRANCH; // beq, bne, blez, bgtz
	if (0x08 <= opCode && opCode <= 0x0F)
	return InstructionStatistics.CATEGORY_ALU; // addi, addiu, slti, sltiu, andi, ori, xori, lui
	if (0x14 <= opCode && opCode <= 0x17)
	return InstructionStatistics.CATEGORY_BRANCH; // beql, bnel, blezl, bgtzl
	if (0x20 <= opCode && opCode <= 0x26)
	return InstructionStatistics.CATEGORY_MEM; // lb, lh, lwl, lw, lbu, lhu, lwr
	if (0x28 <= opCode && opCode <= 0x2E)
	return InstructionStatistics.CATEGORY_MEM; // sb, sh, swl, sw, swr
	return InstructionStatistics.CATEGORY_OTHER;
	}

If you want to try to solve either of these and have trouble, feel free to ask for advice.

Printing unicode block elements using syscall

I am porting a graphics library from MIPS to RISC-V and I need to print the unicode full block element using syscalls. Does RARS not support printing unicode characters? I load the character into memory using: .asciz "█", perform a printString ecall, and in debugging I get a generic looking outline of a box for any non-printable ascii characters. Do you have any ideas on how to fix this? I apologize if this is the wrong place to ask this.

CSR time and timeh registers

Hi,
I think it would be very nice if the CSR registers time (3073) and timeh (3201) could be implemented, as simple as
long csr_time = System.currentTimeMillis();

Suggestion:
Maybe, to reduce the computational complexity, instead of continuously showing their values in the register bank panel, these values can be updated only when these registers are read by csrr t0, 3073 or csrr t0, 3201 instructions.

We are implementing these registers on RISC-V hardware (FPGA), and this improvement in Rars would be nice to maintain the "compatibility".
Of course, there are many other issues involved, such as step-by-step execution and back step tracking, as you said before, but we can deal with this in sequence. :)

Add a setting in Memory Configuration for custom map address

Title pretty self explanatory. It would be useful to be able to customize the address map.

Improved address selector

As a part of my continued work on refactoring the memory system, I think it would be useful to revamp how the data segment navigation works. I am thinking of replacing the dropdown shown below.

I think it could also make sense to replace the dropdowns in the bitmap display and memory reference visualization tools. #37 is related.

My idea is to replace them with textboxes which accept address, registers, labels, or segment names. For example, 0x00400000 would select the beginning of .text, sp would select the current stack pointer, main would select the label main, and mmio would select the memory mapped region. If possible this would also include tooltips to shown what labels, segment names are available from the currently typed characters.

My concern about doing this is it may be less intuitive. I think it would be hard for someone to discover everything that it can do.

If anyone has an idea to help people learn how it works or has an alternative idea I would like to hear it.

@mehrabmehdi

Support for Instruction Run and Memory Requests dump

It would be great if RARS could support dumping of memory access and instruction traces during run-time so that, these traces can used to generate statistics for branch behaviour, instruction mixing and to design caches. We are using RARS for teaching RISCV programming in an introductory computer architecture class. Please let us know if this issue can be fixed. Thank you very much.

Fix autocomplete

Autocomplete was accidentally removed in 67428cd. It should be fixed. This would mean moving a bunch of code from old commits to the current master.

This should be mainly confined to rars/venus.

Using RARs on real hardware. RISC-V on OpenFPGA

This is not really an issue. I just wanted to thanks to all the RARs developers the great work they are doing

At the Rey Juan Carlos University in Madrid (Spain) we are using RARs for teaching the students about RISC-V programming

I wanted to share with you how easy was to go from the simulation to executing programs on real hardware. We have synthesized an RV32I into an OpenSource FPGA. The programs are simulated with the RARs and the code is dumped into a binary file that is flashed into the board. Students can test they programs on a real Risc-V machine

In this short video you can see a demonstration

https://www.youtube.com/watch?v=UZmUT49Lqq0

Thanks you very much! Keep up the good work! 😄

Keyboard MMIO Simulator

I can't seem to get the Keyboard MMIO to cause an interrupt, and wondering if the code for it is actually implemented or not?

I'm testing it by making a simple program that sets utvec to the handler address, enables all user, supervisor and machine interrupts in ustatus and in uie I'm enabling all software, timer and external interrupts, but it doesn't jump to the handler when I use the Keyboard MMIO simulator.

I'm following the tables in the second half of these slides to know what the bits are for

.text
    	la t0,handler
 	csrrw zero, 5, t0 	# utvec
 	csrrsi zero, 0, 0xb	# status
 	li t0 0xbbb
 	csrrs zero, 4, t0	# ie
loop:
	nop
	nop
	jal x0, loop
handler: 
	li a7 10 
	ecall

The address of CSR instreth register bug

Hi,
According to Table 2.2 on page 9 of the manual riscv-privilegied-v1.10, the CSR instreth register has the address 0xC82, ie 3202, not 3201, as defined in the Rars.
Is there any plan to implement time and timeh registers?

[]
Marcus Vinicius

Error with the first bit of the immediate value in some instructions

testing with andi instruction

testing with ori instruction

the same happens with lui instruction, rars is not able to assemble these instructions whenever the first bit of the immediate number is equal to 1.

Machine code generated by the assembler is wrong for some instructions.

Test code:
bge t0, t1, AWW
bgeu t0, t1, AWW
bltu t0, t1, AWW
AWW:

According to the funct3 field of the Risc-v official specifications Page 104 (chapter 19) , The correct machine codes will be in the first line and the Rars generated Codes will be in the second one for each instruction:

• bge t0, t1, AWW

  00000000011000101 |101| 100001100011
  00000000011000101 |110| 100001100011

• bgeu t0, t1, AWW
  00000000011000101 |111| 011001100011
  00000000011000101 |100| 011001100011

• bltu t0, t1, AWW
  00000000011000101 |110| 001001100011
  00000000011000101 |101| 001001100011