trexxet/virtaxy-vm

Flexible functional simulator and assembler for user-defined architectures

I'm a 23 24 25 yo from Moscow. You are welcome to check my projects below.

Konstantin is my second name, don't be confused!

Due to enforcing PAT authentification, enforcing 2FA, and Github's submission to some Indian corporation, I'll be moving my projects to Gitlab. You can find them here. I urge you to do the same.

virtaxy-vm's Issues

Implement simple math expression parser for asm

Support for integer +, - (both binary and unary), *, /, parenthesis, precedence
mov rax, 2+3*2 -> mov rax, 8

Add symbol table to expression parser

foo equ 15
bar equ foo*2
mov rax, bar + foo - 3 ; 42

Add tests for ISA example programs

using CTest I suppose

Add custom instruction decoder

Sample arch, virtaxy, has kinda simple (but not effective) instruction format:

IP[0] = opcode
IP[1] = arg1
IP[2] = arg2
IP[3] = arg3

However, real archs have more complex formats. Some of them, like 8086, have different sizes for instructions, so user-defined decoder may be combined with fetch stage. Decoder should work in a simple and clear way without user having to go into the machine structure.

Implement 8086 ISA