- Day 1 - NAND Gate and Half Adder
- Day 2 - Full Adder and test bench for half adder, full adder
- Day 3 - d flipflop, testbench for d flipflop and 4 bit adder
- Day 4 - testbench for structural 4 bit adder, 4 bit adder behavorial type alt ways and testbench for alt ways
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Codes from VHDL Lab - COA