virtual-labs/exp-half-full-subtractor-iitr

This experiment belongs to Digital Electronics IITR Lab.​​​​                                                 Full Name: "To Study and Verify Half and Full Subtractor"

Introduction (Round 0)

Discipline	Engineering
Lab	Digital Electronics
Experiment	3. To Study & Verify Half/Full Subtractor.

About the Experiment :

This experiment is to verify the truth table of half subtractor by using the ICs of XOR, NOT and AND gates and of full subtractor by using the ICs of XOR, AND, NOT and OR gates respectively and analyse the working of half subtractor and full subtractor circuit with the help of LEDs in simulator 1 and verify the truth table only of half subtractor and full subtractor in simulator 2.

Name of Developer	R.S. Anand
Institute	IIT Roorkee
Email id	[email protected]
Department	Electrical Engineering

Contributors List

SrNo	Name	Faculty or Student	Department	Institute	Email id
1	R.S. Anand	Faculty	Electrical Engineering	IIT Roorkee, Roorkee	[email protected]
2	Jasbir Singh	Research Fellow	Electrical Engineering	IIT Roorkee, Roorkee	[email protected]
3	Rajeev Kumar	Research Fellow	Electrical Engineering	IIT Roorkee, Roorkee	[email protected]
4	Priyanshi Agarwal	Research Fellow	Electrical Engineering	IIT Roorkee, Roorkee	[email protected]