wallento/wb2axi

Wishbone to ARM AMBA 4 AXI

Wishbone to AXI bridge

This module bridges a Wishbone slave interface to an ARM® AMBA® AXI interface.

It is very stupid at the moment and ignores all bulk data transfers, which makes it slow in most environments. Please feel free to extend and improve.

wb2axi's Issues

Mismatched address widths

AXI addresses are octet based, WB addresses are word based. For a 32-bit data word, the AXI address should have another 2 bits beyond what the WB address would provide. This core treats the two as though they were identical.

Inappropriate logic clear

On a response from AXI, the request valid line is used to clear the respective *done lines. This only works if the wishbone interface immediately drops the request. If the interface is deeper in an interconnect, it may take several clocks for the cycle and strobe lines to be dropped. In that case, multiple AXI requests will be issued given only one WB request.

The solution would be to not clear the *done flags until the WB cycle line is dropped, something that needs to happen in WB classic anyway before the next transmission.

Dan

Wrong AxSIZE

The core defines the AXI AWSIZE and ARSIZE registers as the DATA_WIDTH >> 4. For the given data width of 32 bits, this would be 2, the correct answer. However, for a data width of 64, this would be 4--the wrong answer. Similarly for a data width of 16 bits, the data width should be 1, not 0.

The correct AxSIZE value should be $clog2(DATA_WIDTH)-3.