Comments (2)
wfjm
commented on July 20, 2024
I made the w11a design for Arty S7 out of curiosity, just to see the performance difference between Artix-7 and Spartan-7. It turned out that there is none, at least for this design.
Given that I have an Arty A7 and a Nexys A7 board (for full portfolio see blog) it makes little sense for me to add an Arty S7. Same price as an Arty A7, slightly larger die size (50 instead of 30), but no Ethernet.
In case I invest in Spartan-7 in the future, I'd likely go for a Trenz TE0890-01-25-1C or Trenz TE0725-03-35 based solution.
However, if someone owns an Arty S7 or has access to one, I'd very much appreciate to receive test reports.
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wfjm
commented on July 20, 2024
Apparently nobody invested into an Arty S7.
The sys_w11a_as7 will be marked untested, removed from the default build and test flows, but kept in the repository.
from w11.
Related Issues (20)
- How to understand tb log HOT 3
- CPU: several deficits in trap logic HOT 2
- CPU: src+dst deltas summed in mmr1 if register identical
- CPU: The AIB bit in MMU PDR register set independant of ACF field
- CPU: MMR0 trap bit set when access aborted
- CPU: no mmu trap when instruction which clears trap enable itself causes a trap HOT 1
- RK11: write protect action too slow
- migrate from Travis to GitHub actions HOT 2
- SimH scmd files fail on current 4.* version; only 3.* supported HOT 5
- time tbrun does not report correct CPU time
- asm-11 compiles nnn(pc) as nnn
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- MMU: ACF=1 traps on any access
- MMU: D space used instead of I space for PC deferred specifiers
- MMU trap delayed/lost when prefetch in s_idecode done HOT 1
- PSW changed after MMU aborts in dstw flows
- I have an ARTY S7 board, I'd like to try your w11 code. HOT 10
- add external ram support on basys3 Implementation HOT 3
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