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algorithms_of_dna_sequencing

benchmark-dhrystone

"DHRYSTONE" Benchmark Program by Reinhold P. Weicker

chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

chisel3

Chisel 3: A Modern Hardware Design Language

coremark

CoreMark® is an industry-standard benchmark that measures the performance of central processing units (CPU) and embedded microcrontrollers (MCU).

cub

Cooperative primitives for CUDA C++.

cucollections

cuda-code

cuda-samples

Samples for CUDA Developers which demonstrates features in CUDA Toolkit

cudalibrarysamples

CUDA Library Samples

deeplearningexamples

Deep Learning Examples

dhrystone

Historical versions of Reinhold P. Weicker's Dhrystone benchmark

eecs499

research

gem5

This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews should be submitted to https://gem5-review.googlesource.com/. The mirrors are synchronized every 15 minutes.

gem5-skylake-config

gem5 configuration for intel's skylake micro-architecture

gem5valid_haswell

gpustresstest

GPU Stress Test is a tool to stress the compute engine of NVIDIA Tesla GPU’s by running a BLAS matrix multiply using different data types. It can be compiled and run on both Linux and Windows.

hello-world

hello world!

kma

llvm-project

The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at http://reviews.llvm.org.

map

Modeling Architectural Platform

microprobe

Microprobe: Microbenchmark generation framework

nautilus_dev

neovim

Vim-fork focused on extensibility and usability

northwestern

northwestern

nvidia-docker

Build and run Docker containers leveraging NVIDIA GPUs

riscv-v-spec

Working draft of the proposed RISC-V V vector extension

rocket-chip

Rocket Chip Generator

speckle

A wrapper for the SPEC CPU2006 benchmark suite.

swerv-iss