- ๐ Hi, This is Hrishikesh
- ๐ VLSI Enthusiast
- ๐ฑ Working on RTL design for FPGAs
- ๐๏ธ Iโm looking to collaborate projects invloving RTL design using verilog
embedded-explorer / prjxray Goto Github PK
View Code? Open in Web Editor NEWThis project forked from f4pga/prjxray
Documenting the Xilinx 7-series bit-stream format.
Home Page: https://symbiflow.github.io/prjxray-db/
License: ISC License