hoangt Goto Github PK

gem5_arm_fullsystem_files_generator

Generator of kernels, bootloaders, DTBs and disk images for aarch32 and aarch64 gem5 Full System simulations (updated April 2018)

gem5_neural_branch_predictor

A functioning gem5 model of a neural-net based branch predictor, benchmarked as branch predictor for a 5-stage Sparc processor versus the default branch predictor.

gem5v

A Modified gem5 for Simulating Virtualized Systems

gemv

GemV Micro-architecture vulnerability estimation tool

genann

simple neural network library in ANSI C

genesis2

A home for Genesis2 sources.

genius-tcad-open

Open-source version of the Genius Semiconductor Device Simulator

gltracesim

A graphics tracing and replay framework to explore system-level effects on heterogeneous CPU+GPU memory systems.

goblin-core

Automatically exported from code.google.com/p/goblin-core

gource

Automatically exported from code.google.com/p/gource

gource-1

software version control visualization

gpgpu-ramulator-simulator

Replace original DRAM model in GPGPU-sim with Ramulator DRAM model

gpgpu-sim_distribution

gplgpu

GPL v3 2D/3D graphics engine in verilog

gpu-cache-model

A GPU cache model

gpu_benchmark

gpuocelot

GPUOCelot: A dynamic compilation framework for PTX

graphbig

A Comprehensive Benchmark Suite for Graph Computing

haddoc2

Caffe to VHDL - by DREAM research group

halide

a language for image processing and computational photography

hamex

Heterogeneous Architecture and Memory Exploration Framework

hammertime

hamming_7264_secded

Hamming(72,64) SECDED FEC software implementation

hardware-scaling-laws

Simulation code for "Massive MIMO with Non-Ideal Arbitrary Arrays: Hardware Scaling Laws and Circuit-Aware Design" by Emil Björnson, Michail Matthaiou, Mérouane Debbah, IEEE Transactions on Wireless Communications, vol. 14, no. 8, pp. 4353-4368, August 2015

hardware_neural_net

Artificial Neural Network in hardware

harmonica

Pipelined Implementation of HARP instruction sets.

harptool

Compiler/Linker/Emulator for Heterogeneous Architecture Research Prototype

hasim-mips

MIPS ISA functional model for HAsim

hbm

High Bandwidth Memory (HBM) timing model based on DRAMSim2

hcode