These are my solutions of labsheets for Computer Architecture (CS F342) at BITS Pilani, Fall 2019
Getting Started With Verilog HDL Programming
Combinational Circuit Modelling
Sequential Circuit Modelling
MIPS ALU Design
MIPS Register File Design
Single Cycle Datapath Design for MIPS
MIPS Multi Cycle Main Controller Design
Pipeline Design
2013-14, 2015-16, 2017-18, 2018-19, 2019-20