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rswarbrick avatar rswarbrick commented on July 20, 2024

Hi there.

I'd probably suggest trying to use Verilator as an initial step. The best starting point is the "simple system" (see here for a description).

Our Questa support is a bit patchy, mainly because the main Ibex dev team don't have Questa licences. We'd definitely appreciate improvements, but it probably isn't the easiest place to start.

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AhmedAmrAbdellatif1 avatar AhmedAmrAbdellatif1 commented on July 20, 2024

Hello @rswarbrick,
Sorry i forgot to mention that i need to test the integration of Ibex Core with RISCV-DV to study it, as i want to integrate my design files of RV64IMC architecture with RISCV-DV.
Thus, i'm not able to do so because of the absence of Xcelium.

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rswarbrick avatar rswarbrick commented on July 20, 2024

If you want to use UVM testing, you'll need a commercial EDA tool at the moment. In that case, I guess you will have to get things working with Questa. Please file bugs if you find dodgy bits!

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AhmedAmrAbdellatif1 avatar AhmedAmrAbdellatif1 commented on July 20, 2024
juba@juba:~/ibex/dv/uvm/core_ibex$ make
Build metadata already exists, not recreating from scratch.
Building RTL testbench
make[1]: *** [scripts/ibex_sim.mk:42: out/metadata/tb.compile.stamp] Error 11
make: *** [Makefile:66: run] Error 2

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