Branching before Forwarding Unit in 5-Stage without Hazard Detection

[MicahDoo]

Branching before Forwarding Unit in 5-Stage without Hazard Detection

[mortbopet]

Hi @MicahDoo

So is the issue here not that there is a RAW hazard on the following?

    addi a0, zero, 0
    # if a0 = 0, branch => if no error, should branch
    beq a0, x0, branch

It is exactly such a situation which a hazard unit is supposed to detect and then dynamically stall the pipeline to realize the 2-cycle bubble (as you indicate with the two nop instructions).

The pipelined processors without hazard units are not supposed to execute a program correctly. They are meant as intermediate design points to be able to illustrate why hazard detection and resolution is required for a pipeline.
It should probably be more clear in the program/processor selection dialog that these processors aren't guaranteed to produce correct results..!

[MicahDoo]

Hi, @mortbopet
Thank you for the response!

Don't worry, the description was clear enough. I was just wondering why, with the "hazard detection off, forwarding on" option, forwarding seems to be incomplete in that it is removed for branching instructions, while kept intact for ALU instructions. In my examples above, I didn't need any nop for RAW with the second instruction being addi as forwarding worked just fine for ALU. But I did need two of them with beq.

And it shows on the datapath layout, too:
This is with hazard detection:

The ALU and Branch Comparator both take their inputs from the forwarding unit, as expected.

This is without hazard detection:

Here the Branch Comparator cannot receive write-back values coming through the two forwarding multiplexers because it doesn't receive inputs through them.

This threw me off a bit because, as far as I know, hazard detection happens in the control unit and is separate from forwarding, which is reflected on the datapath. I am curious as to why this configuration without hazard detection changes the forwarding functionality in the datapath in this way?

[mortbopet]

Looking this through, i think you're right that there is a bug here - the branch unit should indeed be connected to the forwarding registers (as it is in the 5-stage model with fw/hz).

Once time permits, i'll push a fix.

[MicahDoo]

Got it. I'm glad that's cleared up. This is an awesome tool and has helped me a lot with understanding RISC-V. Thank you for making this possible. Keep up the good work!