mortbopet/ripes

A graphical processor simulator and assembly editor for the RISC-V ISA

ripes's Issues

Feature request

Ripes can read binary files, but save would also be nice. That could help students to use Ripes as the golden model for their own ISA simulation implementation.

Same logic but different result using bge

Here, line 12 on the right is equivalent to lines 12 and 13 on the left. However, we have different results for t1 and t2. If I'm wrong please let me know.

Issue with SW followed by LB and/or LH

Problem arises in the following test file

lui s0 239437
addi s0 s0 -467
sw s0 100(x0)
lb t0 100(x0)
lb t1 101(x0)
lb t2 102(x0)
lb t3 103(x0)
lh t4 100(x0)
lh t5 102(x0)
lh t6 101(x0)
lui s2 2
addi s2 s2 2040
addi s1 x0 50
sw s2 -23(s1)
lw s3 -23(s1)
addi a0 x0 10
ecall

Error ?

error in:

.data
str: .string "841"
a0: .word 0 #Contador

.text
addi t5,zero,48
addi t6,zero,57
addi t3,zero,0
la t1,str
length:
lb t2,0(t1)
blt t2,t5,fimContagem # se t2<48,(48 representa 0, em decimal, ASCII) vá para fimContagem
blt t6,t2,fimContagem # se 57<t2 , vá para fimContagem (57 representa 9 em decimal, tabela ASCII)
addi t3,t3,1 #incrementando o contador do tamanho da palavra

addi t1,t1,1
beq x0,x0,length

fimContagem:

but, if change to this new code, it's okay:

.data
str: .string "841"
a0: .word 0 #Contador

.text
la t1,str
addi t5,zero,48
addi t6,zero,57
addi t3,zero,0
length:
lb t2,0(t1)
blt t2,t5,fimContagem # se t2<48,(48 representa 0, em decimal, ASCII) vá para fimContagem
blt t6,t2,fimContagem # se 57<t2 , vá para fimContagem (57 representa 9 em decimal, tabela ASCII)
addi t3,t3,1 #incrementando o contador do tamanho da palavra

addi t1,t1,1
beq x0,x0,length

fimContagem:

Improve readability of disassembled view

Currently, it can be quite hard to navigate between the assembly view and the disassembly view.
Options to improve readability could be:

• print comments in the disassembled view to indicate labels in the assembly code
• Highlight different sections using colors, just as the view in compiler explorer

For both cases, it should be made sure that the solution does not break Ripes when loading a flat binary file

when make command is types in ubunty 18.04 terminal

How do I make an array?

How do I make an array? In MIPS, I put this in the data area:
.date
myArray: .space 400

In this example, I create an array with 100 integers of 4 bytes. How do I do in the Ripes assembly?

Please provide AppImage for download

Providing an AppImage would have, among others, these advantages:

• Applications packaged as an AppImage can run on many distributions (including Ubuntu, Fedora, openSUSE, CentOS, elementaryOS, Linux Mint, and others)
• One app = one file = super simple for users: just download one AppImage file, make it executable, and run
• No unpacking or installation necessary
• No root needed
• No system libraries changed
• Works out of the box, no installation of runtimes needed
• Optional desktop integration with appimaged
• Optional binary delta updates, e.g., for continuous builds (only download the binary diff) using AppImageUpdate
• Can optionally GPG2-sign your AppImages (inside the file)
• Works on Live ISOs
• Can use the same AppImages when dual-booting multiple distributions
• Can be listed in the AppImageHub central directory of available AppImages
• Can double as a self-extracting compressed archive with the --appimage-extract parameter

Here is an overview of projects that are already distributing upstream-provided, official AppImages.

If you have questions, AppImage developers are on #AppImage on irc.freenode.net.

mul is not being assembled

I'm trying to use the instruction mul (mul x10, x11, x12) but it won't assemble.

make layout suitable for laptop screen

I don’t know which widget restricts the minimum size, the width of the entire window exceeds the screen width and cannot be reduced.
The laptop I used is a bit old, the resolution is 1366*768, which was popular in a few years ago.

Image in README not found

Run Pipeline object in separate thread

Currently, programs with long simulation times as well as infinite loops can hang the program, since the Pipeline object lives in the GUI thread.

It should be fairly simple to create the Pipeline in a separate thread and create a message box for when "run" is selected, which monitors the execution and gives the user the ability to stop the program, as well as notifying them that there may be an infinite loop in the program.

QRegularExpression: No such file or directory

When I try to compile on Ubuntu 18.04 I get the error that QRegularExpression is not found. I have both qt 5.11 and 5.13 installed.

I run qtchooser with qmake -qt to set the version of qt to one that contains QRegularExpression but still QT tries to use qt4 and thus fails to find the QRegularExpression.

Allow for '(' and ')' characters to exist in a label declaration

Allowing for this would make us not have to remove the function argument type when inserting RISC-V compiled code from compiler explorer.

The issue lies with the default splitter regex that is used in syntaxhighlighter.cpp in checkSyntax()

Display decimal immediate in hexadecimal format for some instructions in "Executable Code"

Please simply try this code

.text
  auipc a0 10  // auipc a0 0x10
  lui t0 10  // lui t0 0x10
  auipc a0 0x10  // auipc a0 0x16
  lui t0 0x10  // lui t0 0x32

The comments is what displayed in the 'Executable Code' window.

The issue is not true for some other instructions such as addi.

CI integration

Is there a way to run it from the command line for batch processing?
Is there a way to dump the stage view to a file?

Write documentation for importing binary files into Ripes

Since the requirements for having a correct binary file is quite strict, documentation of this must be provided.

Must contain:

• Notify that the application does not load .ELF files
• calls are are not supported
• expects a flat binary file - data segments can be stored in the .text segment, but if so, the program should end with an ecall 10 operation before entering the data segment. This prevents the simulator from running the data as instructions.

When unlocking the view and moving the processor, some models show invalid wires

These wires are shown due to some ports not being set as hidden. This can be fixed by editing the layouts of the processors.

sw instruction error

li x5,0x44332211
sw x5,0x12(x0)

it seems that sw instruction can not use Hexadecimal offset

improvements

hi, congrats cause you developed the only visual simulation for riscv. i'm trying to create a riscv simulator for teaching purposes and i find this very promising. would you be interesting to communicate with me to see if there is a way to help each other improve ripes so it can be used as a tool in advanced architecture classes?

Simple assembler optimization

Currently for li a0, 0xff000000 assembler will generate two instructions lui x10 1044480; addi x10 x10 0. The second instruction is practically a nop.

A simple check in assembling immediate instructions with the same register and value of zero (for addi, ori, xori, slli, srli, srai) should be enough for starters.

Error with li pseudo instruction

Hi,

I think there is an issue with either the code that replaces the li pseudo instruction with lui and addi or one of this instructions is buggy.

To reproduce, enter this source code:

li x1, 1193046

The assembled output is:

lui x1 292
addi x1 x1 1110

Executing this code, I don't see the expected value of 1193046 in x1 but 1197142.

But, if I execute the following code, the result in x2 is correct.

lui x2, 292
addi x2, x2, 1110

Regards
Joachim

Instructions make program crash

I try run this instructions, but the program crash and close:

jal zero, f
g: jalr zero, ra, 0
f: jal ra, g

Make instructions that take symbols accept immediate values

How to compile from tar.gz ?

Hi,

the AppImage does not work in CentOS7.
How do I compile the source code?
There semms to be no configure.

Best Regards,
Elmar

Please provide a new release

I tried to build the application and deply it but I'm getting error 0xc000007b.
Could you provide a new release with recent comits?

Add instruction formats to assembly error tooltip

For instance, if a user tries to write jalr x0 0(x1) the tooltip should also state that jalr has the format
jalr [rd] [rs] [imm].

bundle gcc toolchain into linux release

for easy of use, we can bundle the gcc toolchain into release(only for Linux?),
then add a c language code input area above assembly code, and provide some buttons like 'compie' , then automatically process the compiled code to meet the required format.

This is very convenient for learning and teaching Computer Architecture Course.

Ripes build succeeds, but app crashes on catalina

How to replicate.
On catalina
mkdir -p Qt/5.13.0
tar -xJ -C Qt/5.13.0 -f Qt-5.13.0-mac.tar.xz
export QT_ROOT/Qt/5.13.0/clang_64
export PATH=$QT_ROOT/bin:$PATH
export PKG_CONFIG_PATH=/usr/local/lib/pkgconfig:$PKG_CONFIG_PATH
mkdir build
cd build
cmake -GNinja ../
open Ripes.app

Can't see full entries in Address column

I am currently using Ripes version v2.0.1-1-g9578aef on an x64-based PC running Microsoft Windows 10 Home Single Language version 10.0.18363 Build 18363. I am using it to teach a Computer Architecture course and I am very grateful that you have made the software freely available.

I cannot see the full entries for the Address column in the Memory tab. I've tried changing the display type and right-clicking and double-left-clicking on the cells. I cannot change the width of the column using my mouse.

Is there a way to see the full entries for the Address column in the Memory tab?

Thank you very much for your time.

Compiler detection doesn't seem to work on Windows with version 2.1.0 binaries

Compiler detection, either autodetection with a should-be-valid compiler in %PATH%, or a specified path to a compiler (via using the Browse button in the Editor Settings dialog), doesn't seem to work on Windows with the 2.1.0 binary release.

I can confirm I'm using the compiler binaries from https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2020.04.1-x86_64-w64-mingw32.zip via https://github.com/sifive/freedom-tools/releases. Looking at the test program embedded in ccmanager.cpp ("int main() { return 0; }"), I can successfully compile this with the following command line ("risc-foo.c" contains only the string above as the entire program):

riscv64-unknown-elf-gcc -march=rv32im -mabi=ilp32 -O0 -x c risc-foo.c -o risc-foo -static-libgcc -lm

I can also load the resulting (ELF) binary into Ripes (via Ctrl+O or "Load Program" under the File menu) and run it in the simulator.

Similarly, I tried a more complex sample, as shown at https://github.com/mortbopet/Ripes/wiki/Building-and-Executing-C-programs-with-Ripes:

#include <stdio.h>

int main() {
   char buffer[128];
   printf("Type something to be echoed:\n");
   fflush(stdout);
   fgets(buffer, sizeof(buffer), stdin);
   printf("\nYou typed: %s", buffer);
   return 0;
}

This also compiles fine with the following command line, and likewise the binary loads fine in Ripes ("risc-foo2.c" is only the program source shown above):

riscv64-unknown-elf-gcc -march=rv32im -mabi=ilp32 -O0 -x c risc-foo2.c -o risc-foo2 -static-libgcc -lm

I'm uncertain what exactly is failing (or seems to be failing) on Windows with the 2.1.0 release binary WRT compiler detection.

Variations in the instructions executed step by step or executed all once

Incorrect behavior on recursive function calls

There's a rather critical bug in the simulator related to recursive function calls. I haven't been able to pinpoint exactly where the problem lies, but I'd guess it's got something to do with instructions that manipulate the return address register (jal, jalr, ...).

The following code implements a function for recursive factorial calculation. It's almost verbatim to an example shown in the Computer Organization and Design: RISC-V Edition book:

main:
        addi     a0, zero, 7 # function argument (7)
        jal      ra, fact 
        jalr     x0, x1, 0

fact:
        addi     sp, sp, -16 
        sw       ra, 8(sp) 
        sw       a0, 0(sp)  
        addi     t0, a0, -1
        bge      t0, zero, nfact

        addi     a0, zero, 1
        addi     sp, sp, 16 
        jalr     x0, x1, 0
                                                     
nfact:
        addi     a0, a0, -1 
        jal      ra, fact 

        addi     t1, a0, 0 
        lw       a0, 0(sp) 
        lw       ra, 8(sp) 
        addi     sp, sp, 16 

        mul      a0, a0, t1
        jalr     x0, x1, 0 

The register a0 is the function argument and the return register. It starts out as 7, so at the end of the program it should read 5040, which is 7 factorial.

If you run it in the RIPES simulator, it'll end as soon as a0 equals 0. The program will step through the final lines before the return, add 1 to a0, 16 to sp, and end. The final value of a0 will always be 1, regardless of the input. What should happen is that the program should return to the last return address (which would be the part in nfact right after the jal instruction) and continue on through the call stack.

However, if you compile the same code using the official RISC-V compiler toolchain, simulate it with the ISA simulator and step through it with the included GDB toolkit, the program works just fine, and outputs 5040 on a0 when it ends, as shown by the register dump below:

zero: 0x0000000000000000  ra  : 0x0000000000010080  sp  : 0x000000007f7e9b50  gp  : 0x0000000000000000  
tp  : 0x0000000000000000  t0  : 0xffffffffffffffff  t1  : 0x00000000000002d0  t2  : 0x0000000000000000  
s0  : 0x0000000000000000  s1  : 0x0000000000000000  a0  : 0x00000000000013b0  a1  : 0x0000000000000000  
a2  : 0x0000000000000000  a3  : 0x0000000000000000  a4  : 0x0000000000000000  a5  : 0x0000000000000000 

If it helps, I also used a C compiler to compile a simple recursive factorial function into RISC-V ASM, and it had the exact same issue.

Highlighting for registers like x30 is wierd

I tested the changes in 396831b and it works, but I noticed that the highlighting of x30 in the mulh instructions was only realizing the first number was part of the instruction. This is probably because referencing registers by x is uncommon, and it is the only way to get a double digit number afterwards so it has yet to be noticed.

This probably is a very low priority issue, but I thought it would be good to share.

[Feature Request]: Add Continuous Save Option

Hi, Ripes is really good and thank you so much for open sourcing it to the community. I noticed that it has a save function but every time you save, you need to pick the file again, it would be nice to be able to select only once and it will keep overwriting that file and reselect again when needed. Also, it would be nice to have a similar option for the output of the assembled code where every time a new code(in Disassembled or Binary) is generated it saves to a file. I'm asking for these features since I'm taking a class where we design our processors and I have to change the assembly and grab the binary to test the processor relatively frequently. I have worked with Qt before, not specifically with Widget but I would be down to help implement this feature.

Vector in the simulator

The .word-declaration is defined as .word expression [, expression]* 32-bit comma separated words.

The simulator Ripes don't support this?

because this code give-me a error:

> .data
> 
> **a: .word -7,8,107,11,13 #vector**
> 
> .text

Simulator hangs on badly specified assembler directives

The following, albeit strange code, hangs the simulator:

jal end
.data
end:

There is no option to create a new file in 'File' menu

Hello there.

I wanted to request for a feature, that is missing in the application.

There is no option to create a new file in the 'File' menu.

In order to write a new code, one has to open the pre-existing examples and edit it.

I hope, the next release adds this feature.

LI pseudo-instruction error?

Hello,
The following assembly pseudo-instruction
li a0,0x1000
is translated into
lui x10 2
instead of
lui x10 1

Need include headers QFile and QDataStream in parser.cpp

diff --git a/src/parser.cpp b/src/parser.cpp
index 3343cb8..db7acab 100644
--- a/src/parser.cpp
+++ b/src/parser.cpp
@@ -1,6 +1,8 @@
 #include "parser.h"
 #include "defines.h"
 #include "pipeline.h"
+#include <QFile>
+#include <QDataStream>
 
 #include <cassert>
 #include <iostream>

Improvement for teaching purposes

For use in academic teaching, it would be interesting a way where it was possible to control the conflict(hazards) resolutions active or not in the pipeline.

Issue if infinite loop starts accidently

Infinite Loop when run in the application

Whenever, there is an instruction that starts the loop to run infinitely many times, the program does not provide any function to stop it.
We have to close the application using task manager.
I hope, that it gets fixed very soon.

Add special syntax help message when a call is used

As a user, a message specifically informing them of that Ripes does not support library calls could be helpful.

Build Instructions

I tried to build on Linux and it seems the git submodules need to be pulled in.

git clone https://github.com/mortbopet/Ripes.git
git submodule init
git submodule update
cd external/VSRTL
git submodule init
git submodule update

cmake .
make

div by 0 crashes the program

When the instruction steps to EX the program crashes if I try to divide something by 0.

Compatibility with other Simulators

I was looking through documentation on Ripes and noticed that a0 was used for designating which system call is used. This struct me as odd because the proxy kernal and gnu tool chain uses a7. When I made RARS I made it to followed that convention and used a7. I decided to check out what venus does and it also uses a0.

Is Ripes trying to match what venus does in this regard?

Additionally, does Ripes have any command line interface or way to automate testing? I would like to run it through RARS's test suite to see what other incompatibilities between RARS and Ripes there might be.

I would like to, if possible, make RARS, Ripes and Venus compatible so that they can share documentation and tutorials because educational material for teaching RISC-V is really lacking.

Does not run on Ubuntu 14.04

Does not run on Ubuntu 14.04:

AppRun: /usr/lib/x86_64-linux-gnu/libstdc++.so.6: version `CXXABI_1.3.9' not found (required by /run/firejail/appimage/.appimage-10255/AppRun)

Please see https://github.com/AppImage/AppImageKit/wiki/Creating-AppImages#creating-appimages-that-are-compatible-with-many-systems.

Reference:
AppImage/appimage.github.io#831

Reversing across ECALLs with return values does not restore ECALL return value in registers

This is due to the fact that the synchronous elements of the circuit (namely the registers) are not saved once an ecall has finished and placed its return values into the registers.

Should be able to be fixed by adding some additional logic of overriding the top of the undo stack for a synchronous component, whenever the synchronous component has been externally modified.
Note, that this is also an issue when manually setting register values through the UI.

LB does not sign-extend result

The result is incorrect compared to results from http://www.kvakil.me/venus/

"li" not correctly expanded

Hello,
I try writing an "li" pseudo-instruction in Ripes and got an issue, for example :

li t2, 0x76543210

is expend in Ripes to (wrong)

lui x7 484676 # 0x7644
addi x7 x7 528 # 0x210

and in gcc to (right)

lui t2,  484675 # 0x76543
addi t2, t2, 528 # 0x210

It seems coming from https://github.com/mortbopet/Ripes/blob/master/src/assembler.cpp#L436:L454 and the + posOffset ... (and i don't understand why this is done...)