Giter Site home page Giter Site logo

physical-computation / sunflower-embedded-system-emulator Goto Github PK

View Code? Open in Web Editor NEW
22.0 9.0 217.0 312.59 MB

Sunflower Full-System Hardware Emulator and Physical System Simulator for Sensor-Driven Systems. Built-in architecture modeling of Hitachi SH (j-core), RISC-V, and more.

Home Page: http://sflr.org

License: BSD 3-Clause "New" or "Revised" License

Makefile 7.72% M 0.24% Objective-C 0.05% C 83.45% C++ 0.71% Redcode 0.01% Python 0.10% Shell 2.40% Yacc 1.42% Coq 0.01% TeX 0.83% HTML 1.98% Perl 0.14% CSS 0.01% Assembly 0.77% SAS 0.07% Module Management System 0.07% Smalltalk 0.03% Papyrus 0.01% Batchfile 0.01%
processor-simulator processor-architecture cross-compiler simulator embedded-systems emulators battery-simulator network-simulator power-simulator hitachi

sunflower-embedded-system-emulator's Introduction

Build Status

About

Sunflower is a full-system emulator for embedded sensing, computation, communication, fault modeling, power dissipation, batteries, and more. It is designed for use in research where you would normally need to have several embedded hardware systems networked over wired or wireless interfaces. Sunflower allows you to take compiled binaries and emulate them instruction by instruction, while emulating the effect of that computation on power dissipation, emulating the effect of the power dissipation on power regulators, modeling the effect of current drawn on electrochemical battery state of charge, and doing all of this for multiple complete embedded systems (tens or even hundreds) networked over wired or wireless networks or integrated into a single chip and communicating over shared memory.


Sunflower Simulator Architecture


Figure 1. An example of a system configuration that can be emulated in Sunflower.

Cloning this repository

The correct way to clone this repository to get the simulator and the submodules it depends on is:

git clone --recursive https://github.com/physical-computation/sunflower-embedded-system-emulator.git

To update all submodules:

git pull --recurse-submodules
git submodule update --remote --recursive

Checkout master branch and take each submodule out of the "Detached HEAD" state:

git submodule foreach git checkout master

Installation instructions

Read the manual (sunflowersim-manual-and-cover.pdf) if you can. Dependencies: Building the simulator depends on GNU awk (gawk), on the GNU version of bison, the GNU version of sed, and libc6-dev-i386, so install them.

Edit conf/setup.conf to match your installation directory and system setup. On macOS, use the configuration:

OSTYPE          = darwin
MACHTYPE        = x86_64

On Linux, use the configuration

OSTYPE          = linux
MACHTYPE        = i386

To configure the emulator to default to RISC-V processor support rather than Hitachi SuperH, you will want:

TARGET		= riscv
TARGET-ARCH	= riscv32-elf

Set the paths to the GNU awk, GNU bison, and GNU sed in conf/setup.conf.

Once you have edited conf/setup.conf, follow the instructions below to build the cross-compiler:

  1. Change directory to tools/source from the root of the Sunflower tree.
  2. Run ./downloads.sh in the directory tools/source relative to the root of the Sunflower tree. This will download the source for various tools needed for building the cross-compilers.
  3. From the root of the Sunflower tree, run make cross-superH to build the Hitachi SH cross compiler or make cross-riscv to build the RISC-V cross compiler.

If you have trouble building on macOS, you might be running into this issue.

The role of setup.conf

The configuration file conf/setup.conf sets global configuration parameters needed by other tools, such as specifying what your workstation architecture is.

The conf/setup.conf configuration file does not influence which processor architectures Sunflower supports: Sunflower by default has support for all architectures enabled and you can create a simulation instance with multiple embedded systems each of a different architecture, all running simultaneously and interacting with each other. The default processor instances when you launch sim are SuperH. You can create RISC-V instances using the sunflower command newnode riscv. You can explicitly request SuperH instances using the command newnode superh. You can have a mix of SuperH and RISC-V processors in the same simulation (i.e., in the same launch of sim). From the simulator’s perspective, both architectures are always supported and it is not possible to purposefully configure the sim for one or the other.

Command history

To keep the emulator implementation independent of any third-part libraries, the Sunflower REPL does not integrate command history (e.g., using the readline library). If you want command history, use rlwrap.

If you use Sunflower in your research, please cite it as:

Phillip Stanley-Marbell and Michael Hsiao. “Fast, Flexible, Cycle-accurate Energy Estimation”. In Proceedings of the 2001 International Symposium on Low Power Electronics and Design, ISLPED ’01. Huntington Beach, California, USA: ACM, pp. 141–146. ISBN: 1-58113-371-5. doi: 10.1145/ 383082.383120.

BibTeX:

@inproceedings{Stanley-Marbell:2001:FFC,
 author = {Phillip Stanley-Marbell and Michael Hsiao},
 title = {Fast, Flexible, Cycle-accurate Energy Estimation},
 booktitle = {Proceedings of the 2001 International Symposium 
              on Low Power Electronics and Design},
 series = {ISLPED '01},
 year = {2001},
 isbn = {1-58113-371-5},
 location = {Huntington Beach, California, USA},
 pages = {141--146},
 numpages = {6},
 publisher = {ACM},
 address = {New York, NY, USA},
}

Phillip Stanley-Marbell and Diana Marculescu. “Sunflower: Full-system, Embedded, Microarchitecture Evaluation”. In Proceedings of the 2nd International Conference on High Performance Embedded Architectures and Compilers. HiPEAC’07. Ghent, Belgium: Springer-Verlag, pp. 168–182. ISBN: 978-3-540-69337-6.

BibTeX:

@inproceedings{Stanley-Marbell:2007:SFE,
 author = {Phillip Stanley-Marbell and Diana Marculescu},
 title = {Sunflower: Full-system, Embedded, Microarchitecture Evaluation},
 booktitle = {Proceedings of the 2nd International Conference on 
              High Performance Embedded Architectures and Compilers},
 series = {HiPEAC'07},
 year = {2007},
 isbn = {978-3-540-69337-6},
 location = {Ghent, Belgium},
 pages = {168--182},
 numpages = {15},
 publisher = {Springer-Verlag},
 address = {Berlin, Heidelberg},
}

sunflower-embedded-system-emulator's People

Contributors

btsouts avatar harrysarson avatar jamestimothymeech avatar jan-heck avatar mvigdorchik avatar phillipstanleymarbell avatar rjlv2 avatar samuelmswong avatar samuelmswong-zz avatar z-gu avatar

Stargazers

 avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar

Watchers

 avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar

sunflower-embedded-system-emulator's Issues

Sunflower should model node's mass

Is your feature request related to a problem?
Sunflower does not model mass. It should.

Describe the solution you'd like
Add commands to model mass and add propulsion model that uses mass information.

Describe alternatives you've considered
None.

Additional context
None.

Not sure if #48 is done, this might be a duplicate.

RISC-V implementation source mixes tabs with spaces

RISC-V implementation source mixes tabs with spaces (or uses spaces instead of tabs) in several files:

  • decode-riscv.c
  • decode-riscv.h
  • instr-riscv.h
  • machine-riscv.c
  • opstr-riscv.h (stray space right after each ']' before the tab)

(cc: @Z-Gu)

Replace Maddr with uintptr_t

Problem

  • make gives a fair few warnings: warning: cast from pointer to integer of different size.
  • These are all due to casts from void * (32 bit) to Maddr (64 bit).

Solutions

  • This cast is safe (as the number of bits are increasing) so we could turn off the warning.
  • However, there is a type designed for storing pointers as an int: uintptr_t (https://en.cppreference.com/w/c/types/integer).
  • The Maddr is only using in mmalloc.c. Unless there is some deeper perpose behind Maddr that I am missing we seem to have "reinvented the wheel" and we could simplify the code base as well as removing these compiler warnings by using uintptr_t here.

Bring benchmarks up to date with current simulator syntax and for current cross compiler

Bring benchmarks up to date with current simulator syntax and for current cross compiler:

  • Some simulator syntax changes since the last time the benchmarks were updated (e.g., newnode syntax)
  • Newest gcc is now for ELF on SuperH, and need to switch back from startup to main
  • Newest C library optimizes strcpy using doubleword operations so doing strcpy or even memmove to transfer NIC_OUI breaks since the simulator assumes peripheral reads are byte reads.
  • Other cleanup (no longer compress SPEC distribution files)

RISCV implementation changes in cache-hitachi-sh.c lead to incorrect behavior on superH

RISCV implementation changes in cache-hitachi-sh.c lead to incorrect behavior on superH. With the changes, benchmarks/source/HelloWorld/ example leads to incorrect simulated program behavior:

Word access (read) at address 0x5024
Sunflower FATAL (node 0) : <Address not in main mem, and not in I/O space either !>


FATAL (node 0): P.EX=[EXTUW]
R0 		0000 1000 0000 0000 0110 1000 1110 1100   [0x080068ec]
R1 		0000 0000 0000 0000 0101 0000 0010 0100   [0x00005024]
R2 		0000 0000 0000 1001 0000 0000 0000 0001   [0x00090001]
R3 		0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
R4 		0000 1000 0000 0000 0110 1001 0101 0100   [0x08006954]
R5 		0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
R6 		0000 0000 0000 0000 0000 0000 0000 1000   [0x00000008]
R7 		0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
R8 		0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
R9 		0000 1000 0000 0000 0110 1000 1111 1000   [0x080068f8]
R10		0000 1000 0000 0000 0110 0101 1010 0100   [0x080065a4]
R11		0000 1000 0000 0000 0101 0101 0111 1100   [0x0800557c]
R12		0000 1000 0000 0000 0101 0101 0011 0100   [0x08005534]
R13		0000 1000 0000 0000 0101 0100 1100 0000   [0x080054c0]
R14		0000 1000 0000 0000 0101 0100 0111 1100   [0x0800547c]
R15		0000 1100 0000 0000 0000 1111 1010 1000   [0x0c000fa8]
R_BANK_0	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
R_BANK_1	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
R_BANK_2	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
R_BANK_3	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
R_BANK_4	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
R_BANK_5	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
R_BANK_6	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
R_BANK_7	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
SR      	0000 0000 0000 0000 0000 0000 0000 0001   [0x00000001]
SSR     	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
GBR     	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
MACH    	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
MACL    	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
PR      	0000 1000 0000 0000 0100 0001 1001 1010   [0x0800419a]
VBR     	0000 1000 0000 0000 0000 0000 0000 0000   [0x08000000]
PC      	0000 0000 0000 0000 0101 0000 0010 0100   [0x00005024]
SPC     	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
TTB     	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
TEA     	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
MMUCR   	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
PTEH    	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
PTEL    	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
TRA     	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
EXPEVT  	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
INTEVT  	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
SLEEP = [NO]
Stopping execution on node 0 and pausing simulation...


[ID=0 of 1][PC=0x5024][3.3E+00V, 6.0E+01MHz]

RISC-V instruction decoding swaps ecall and ebreak

Describe the bug

The instructions ecall (0x00000073) and ebreak (0x00100073) are decoded as each other by sunflower.

To Reproduce

With this assembly:

.globl _start
.align 4


_start:
	ecall;
	j _start;

Screenshots

screenshot from 2019-02-27 21-31-52

Dump floating point registers in riscv

There is currently no way to view the contents of floating point registers when running sunflower in "riscv" mode.

I have two possible ideas about a solution although there may be other (better) approaches.

  1. Add a new command that dumps floating point registers.
  2. Modify the behavior of the existing command DUMPREGS to also print the values stored in floating point registers.

Incorrect evaluation of double precision floating point operations

Describe the bug

Sunflower gives the wrong value for the double precision inverse sine. Assuming newlib's implementation of asin() is correct one of the double precision floating point instructions it uses must be incorrect.

To Reproduce

.globl _start
.globl __errno
.align	4

_start:
init:
.option push
.option norelax
	la		gp, __global_pointer$
.option pop
	call	bug;
	call 	exit;

__errno:
	.long	0

.fp_s_5:
  .word 1056964608

.fp_d_5:
  .word 0
  .word 1071644672

bug:
	li          5, 7;
	lu         a5, %hi(.fp_d_5);
	fld        fa0, %lo(.fp_d_5)(a5);
	fmv.d   fs2, fa0;
	call 	    asin;
	fmv.d   fs0, fa0;

	ret;

Expected behavior

Value of 0.52 (rad) stored in fs0.

Actual behaviour

Value of -0.42482576 stored in fs0.

Screenshots

Screenshot from 2019-03-13 16-24-23

cc: @rjlv2


Note this is running on a patched version of sunflower - but I have not touched anything that could have caused this (I hope).

32 bit float opperations do not check that arguments are "NaN boxed" when stored in 64 bit registers.

Describe the bug

When we store single precision (32 bit) floating point values in 64 bit floating point registers they should be NaN boxed: the first 32 bits should be set to 1. Currently this does not happen, instead single precision floating point values are zero extended.

To Reproduce
Run riscv_newton-raphson benchmark and inspect the values of the floating point registers.

Note: currently inspecting these registers requires modification of sunflower source code.

Expected behavior
As described in section 9.2 of https://riscv.org/specifications/:

When multiple floating-point precisions are supported, then valid values of narrower n-bit types,
n < FLEN, are represented in the lower n bits of an FLEN-bit NaN value, in a process termed
NaN-boxing. The upper bits of a valid NaN-boxed value must be all 1s. Valid NaN-boxed n-bit
values therefore appear as negative quiet NaNs (qNaNs) when viewed as any wider m-bit value,
n < m ≤ FLEN.

Host OS:

  • OS: Linux (Ubuntu 18)

You local changes (please complete the following information):

origin	https://github.com/phillipstanleymarbell/sunflower-simulator (fetch)
origin	https://github.com/phillipstanleymarbell/sunflower-simulator (push)
```

make for swradio fails

jonathanlim@Jonathans-MacBook-Pro:~/Documents/Compiler/sunflower-simulator/benchmarks/source/swradio (master) $ make
/Users/jonathanlim/Documents/Compiler/sunflower-simulator/tools/bin/sh-coff-gcc -nostdlib -fno-builtin -DM32 -O3 -Wall -I../../../../sys/include -I../ -I../../port -I../../../../sys/libOS/port -I../../../../sys/kern/superH -I../../../../sim -c ../../port/devnet.c
In file included from ../../port/devnet.c:1:
../../../../sim/e-types.h:38:20: error: stdint.h: No such file or directory
In file included from ../../port/devnet.c:6:
../../../../sim/network-hitachi-sh.h:108: error: expected specifier-qualifier-list before ‘uint64_t’
../../../../sim/network-hitachi-sh.h:211: error: expected specifier-qualifier-list before ‘uint8_t’
../../../../sim/network-hitachi-sh.h:256: error: expected specifier-qualifier-list before ‘uint32_t’
../../../../sim/network-hitachi-sh.h:312: error: expected specifier-qualifier-list before ‘uint32_t’
In file included from ../../port/devnet.c:7:
../../port/devlog.h:1: error: expected ‘)’ before ‘’ token
In file included from ../../port/devnet.c:9:
../../port/devnet.h:1: error: expected ‘)’ before ‘
’ token
../../port/devnet.h:2: error: expected ‘)’ before ‘’ token
../../port/devnet.h:3: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘attribute’ before ‘devnet_getrxfsz’
../../port/devnet.h:4: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘attribute’ before ‘devnet_getmaxfsz’
../../port/devnet.h:5: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘attribute’ before ‘devnet_getncr’
../../port/devnet.h:6: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘attribute’ before ‘devnet_getspeed’
../../port/devnet.h:9: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘attribute’ before ‘devnet_getncolls’
../../port/devnet.h:10: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘attribute’ before ‘devnet_getncsense’
In file included from ../../port/devnet.c:10:
../../port/misc.h:4: warning: parameter names (without types) in function declaration
../../port/misc.h:7: warning: parameter names (without types) in function declaration
../../port/devnet.c:14: warning: parameter names (without types) in function declaration
../../port/devnet.c:15: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘attribute’ before ‘getpsr’
../../port/devnet.c:26: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘attribute’ before ‘devnet_getncr’
../../port/devnet.c: In function ‘devnet_framedelay’:
../../port/devnet.c:43: warning: implicit declaration of function ‘devnet_getmaxfsz’
../../port/devnet.c:43: warning: implicit declaration of function ‘devnet_getspeed’
../../port/devnet.c: At top level:
../../port/devnet.c:49: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘attribute’ before ‘devnet_getmaxfsz’
../../port/devnet.c:65: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘attribute’ before ‘devnet_getrxfsz’
../../port/devnet.c:81: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘attribute’ before ‘devnet_getncolls’
../../port/devnet.c:97: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘attribute’ before ‘devnet_getncsense’
../../port/devnet.c:113: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘attribute’ before ‘devnet_getspeed’
../../port/devnet.c:128: error: expected ‘)’ before ‘
’ token
../../port/devnet.c:219: error: expected ‘)’ before ‘*’ token
../../port/devnet.c: In function ‘devnet_ctl’:
../../port/devnet.c:236: error: ‘uint32_t’ undeclared (first use in this function)
../../port/devnet.c:236: error: (Each undeclared identifier is reported only once
../../port/devnet.c:236: error: for each function it appears in.)
../../port/devnet.c:236: error: expected ‘;’ before ‘ifc_shift_offset’
../../port/devnet.c:241: error: ‘ifc_shift_offset’ undeclared (first use in this function)
make[1]: *** [devnet.o] Error 1
make: *** [all] Error 2

-fbracket-depth is not a valid option in gcc

In tools/Makefile, -fbracket-depth is in $CFLAGS under gcc-pre. This is not a valid option according to man gcc (although some searching suggests that it is available in some forks), which prevents gcc from being built on my linux (Gentoo) host, reported as:
error: C compiler cannot create executables
Removing this option solves this problem on my host.

Show ABI names when dumping registers

Is your feature request related to a problem?

When dumping registers it is hard to find the significant registers.

Describe the solution you'd like

If sunflower print the ABI name of a register (sp for register 2, ra for 3, etc) it would be much easier to interpret the register dump.

Additional context

If this feature is wanted I can submit a PR.

Make cross-compiler failed

rm -rf targ-include stmp-targ-include mkdir targ-include targ-include/sys targ-include/machine for i in ../../../newlib/libc/machine/sh/machine/*.h; do \ if [ -f $i ]; then \ cp $i targ-include/machine/basename $i; \ else true; fi ; \ done for i in ../../../newlib/libc/sys/sh/include/*.h; do \ if [ -f $i ]; then \ cp $i targ-include/basename $i; \ else true; fi ; \ done for i in ../../../newlib/libc/sys/sh/sys/*.h; do \ if [ -f $i ]; then \ cp $i targ-include/sys/basename $i; \ else true; fi ; \ done touch stmp-targ-include Making all in libc Making all in stdlib sh-coff-gcc -B/Users/Hippo/sunflower-simulator/tools/source/newlib-1.9.0/objdir/sh-coff/newlib/ -isystem /Users/Hippo/sunflower-simulator/tools/source/newlib-1.9.0/objdir/sh-coff/newlib/targ-include -isystem /Users/Hippo/sunflower-simulator/tools/source/newlib-1.9.0/newlib/libc/include -DPACKAGE=\"newlib\" -DVERSION=\"1.9.0\" -I. -I../../../../../newlib/libc/stdlib -O2 -I../../targ-include -I../../../../../newlib/libc/../libc/include -fno-builtin -Os -c ../../../../../newlib/libc/stdlib/__adjust.c make[5]: sh-coff-gcc: No such file or directory make[5]: *** [__adjust.o] Error 1 make[4]: *** [all-recursive] Error 1 make[3]: *** [all-recursive] Error 1 make[2]: *** [all-target-newlib] Error 2 /bin/sh ../mkinstalldirs /Users/Hippo/sunflower-simulator/tools/superH /Users/Hippo/sunflower-simulator/tools/superH make[3]: Nothing to be done for install'.
Making install in libc
Making install in stdlib
sh-coff-gcc -B/Users/Hippo/sunflower-simulator/tools/source/newlib-1.9.0/objdir/sh-coff/newlib/ -isystem /Users/Hippo/sunflower-simulator/tools/source/newlib-1.9.0/objdir/sh-coff/newlib/targ-include -isystem /Users/Hippo/sunflower-simulator/tools/source/newlib-1.9.0/newlib/libc/include -DPACKAGE="newlib" -DVERSION="1.9.0" -I. -I../../../../../newlib/libc/stdlib -O2 -I../../targ-include -I../../../../../newlib/libc/../libc/include -fno-builtin -Os -c ../../../../../newlib/libc/stdlib/__adjust.c
make[5]: sh-coff-gcc: No such file or directory
make[5]: *** [__adjust.o] Error 1
make[4]: *** [install-recursive] Error 1
make[3]: *** [install-recursive] Error 1
make[2]: *** [install-target-newlib] Error 2
make[1]: *** [newlib-pre] Error 2
make: *** [cross] Error 2
`

Valuestats Read / Write values in history mixed

would be nice to know which ones are reads vs writes.

e.g.)

Name:                double  prev_x_acceleration
PCstart:             0x8004710
Frame offset:        0x10
Size:                0x8
Read accesses:       32
Write accesses:      34

Value History: 1066201600 2518417408 1066201600 2518417408 1072162656 922809902 1072162656 922809902 1072162573 2516592026 1072162573 2516592026 1070976701 2231369728 1070976701 2231369728 3219913740 15878292 3219913740 15878292 3219912369 6357509 3219912369 6357509 3219895068 255 3219895068 255 3219895790 48338 3219895790 48338 3219348328 2646794240 3219348328 2646794240 1069894850 2019098624 1069894850 2019098624 1071901901 3830926188 1071901901 3830926188 1072163156 2684356493 1072163156 2684356493 1061618732 4093640948 1061618732 4093640948 3219065992 1604707328 3219065992 1604707328 3211041043 1571028992 3211041043 1571028992 3219900483 16415732 3219900483 16415732 3219168237 2415930285

AUIPC off by 4

Describe the bug

Rather than adding an immediate to the program counter as seen when an instruction is fetched, riscv_auipc() adds the immediate to the already incremented value of the program counter. Thus the result is 4 too high.

To Reproduce

init.S

.globl _start
.align	4

_start:
	auipc   t0, 0;
	j 		_start;

sunflower:

[ID=0 of 1][PC=0x8004000][3.3E+00V, 6.0E+01MHz] dumpregs
...
R5 	t0  	0000 1000 0000 0000 0100 0000 0000 0100   [0x08004004]
...

Expected behavior

As shown by the following objdump output:

Disassembly of section .text:

08004000 <_start>:
 8004000:	00000297          	auipc	t0,0x0
 8004004:	ffdff06f          	jal	zero,8004000 <_start>

The value of the program counter when the auipc t0,0x0 is executed is 0x8004000 but the value stored in t0 is 0x08004004!

Related: #66

Sim make command

Ran make in sim and got the following error:

gcc -g -DSF_L_ENDIAN -Wall -g -m32 -O0 -c randgen.c
In file included from /usr/include/features.h:447:0,
from /usr/include/bits/libc-header-start.h:33,
from /usr/include/math.h:27,
from randgen.c:38:
/usr/include/gnu/stubs.h:7:11: fatal error: gnu/stubs-32.h: No such file or directory

include <gnu/stubs-32.h>

       ^~~~~~~~~~~~~~~~

compilation terminated.
make: *** [Makefile:79: randgen.o] Error 1

Having changed to correct HOST and SUNFLOWERROO

make for DAM+Sift fails

jonathanlim@Jonathans-MacBook-Pro:~/Documents/Compiler/sunflower-simulator/benchmarks/source/sbench/DAM+Sift (master) $ make clean; make
rm -rf init.i *.o damv2 damv2.sr damv2.map
/Users/jonathanlim/Documents/Compiler/sunflower-simulator/tools/bin/sh-coff-gcc -E init.S > init.i; /Users/jonathanlim/Documents/Compiler/sunflower-simulator/tools/bin/sh-coff-as init.i -o init.o
/Users/jonathanlim/Documents/Compiler/sunflower-simulator/tools/bin/sh-coff-gcc -DSIFT_RANDTABLE -nostdlib -fno-builtin -DM32 -Wall -DLOGMARKERS -gstabs3 -O0 -I../Sift-MAC -I../../port -I../../../../sys/include -I../../../../sys/kern/superH -I../../../../sim -I../../../../sys/libOS/port -c ../../port/devrtc.c
In file included from ../../port/devrtc.c:1:
../../../../sim/e-types.h:38:20: error: stdint.h: No such file or directory
../../port/devrtc.c:6: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘attribute’ before ‘devrtc_getusecs’
make: *** [devrtc.o] Error 1

No 'tools/superH/lib/gcc-lib' directory

I encountered an error regarding perl and regex when compiling gcc. As suggested in README, I manually ran make install and make gcc-post; make newlib.
make gcc-post failed as tools/superH/lib/gcc-lib does not exist. The rest of the installation was successful once I commented out the relevant lines, but I am not sure if it is right to do...

AUIPC does not shift immediate before adding to program counter

Expected behavior

UIPC (add upper immediate to pc) is used to build pc-relative addresses and uses the U-type
format. AUIPC forms a 32-bit offset from the 20-bit U-immediate, filling in the lowest 12 bits with
zeros
, adds this offset to the pc of the AUIPC instruction, then places the result in register rd.

Actual Behaviour

op-riscv.c:

void riscv_auipc(Engine *E, State *S, uint8_t rd, uint32_t imm0)
{
	reg_set_riscv(E, S, rd, imm0 + S->PC);

	return;
}

To Reproduce
Steps to reproduce the behavior:

  1. init.S
.globl _start
.globl __errno
.align	4

_start:
init:
 	auipc	gp,0x6
	j 	init;
  1. run in sunflower
  2. dumpregs
[ID=0 of 1][PC=0x8004000][3.3E+00V, 6.0E+01MHz] dumpregs
R0 	zero	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
R1 	ra  	0000 0000 0000 0000 0000 0000 0000 0000   [0x00000000]
R2 	sp  	0000 1000 0000 0000 1111 1111 0000 0000   [0x0800ff00]
R3 	gp  	0000 1000 0000 0000 0100 0000 0000 1010   [0x0800400a]
...
  1. uipc has added 0x6 to 0x08004004. It should have added 0x6000.

Additional context

I found this after spending a very long time trying to find out why newlib's exit() was reading a completely invalid potion of memory. It turns out that we can't really blame newlib.

No bin file directory

In tools there shoud be a tools/bin directory - I have fololwed all the steps up to this point, but have not got a tools/bin directory to add to my path

Recommend Projects

  • React photo React

    A declarative, efficient, and flexible JavaScript library for building user interfaces.

  • Vue.js photo Vue.js

    🖖 Vue.js is a progressive, incrementally-adoptable JavaScript framework for building UI on the web.

  • Typescript photo Typescript

    TypeScript is a superset of JavaScript that compiles to clean JavaScript output.

  • TensorFlow photo TensorFlow

    An Open Source Machine Learning Framework for Everyone

  • Django photo Django

    The Web framework for perfectionists with deadlines.

  • D3 photo D3

    Bring data to life with SVG, Canvas and HTML. 📊📈🎉

Recommend Topics

  • javascript

    JavaScript (JS) is a lightweight interpreted programming language with first-class functions.

  • web

    Some thing interesting about web. New door for the world.

  • server

    A server is a program made to process requests and deliver data to clients.

  • Machine learning

    Machine learning is a way of modeling and interpreting data that allows a piece of software to respond intelligently.

  • Game

    Some thing interesting about game, make everyone happy.

Recommend Org

  • Facebook photo Facebook

    We are working to build community through open source technology. NB: members must have two-factor auth.

  • Microsoft photo Microsoft

    Open source projects and samples from Microsoft.

  • Google photo Google

    Google ❤️ Open Source for everyone.

  • D3 photo D3

    Data-Driven Documents codes.