silabs-oysteink/core-v-docs

Documentation for the OpenHW Group's set of CORE-V RISC-V cores

core-v-doc

The documentation for the OpenHW Group's set of CORE-V RISC-V cores. Much, but not all, of the documentation here is captured in reStructuredText and is rendered to html using Sphinx. These documents are viewable using readthedocs, see below.

Directory contents...

cores

Architecture and Design documentation for the CORE-V cores. The readthedocs rendering of the CV32E40P User Manual can be viewed here.

verif

Verification Strategy, Verification Plans, Workflow plus meeting slides and minutes. The readthedocs rendering of the CORE-V Verification Strategy can be viewed here.

platform

Information about the hardware and software of the physical platforms built to demonstrate the capabilities of the CORE-V cores. Coming soon.

Issues and Troubleshooting

If you find any problems or issues with the documentation, please check out the issue tracker and create a new issue if your problem is not yet tracked.

credits

The flow, style, and parts of the content of the CV32E40P User Manual are based on the Ibex User Manual from lowRISC.