Comments (3)
Hi there tanman,
All the System Generator IPs should be valid for Vivado 19.2. I have not been able to look at this myself and, until the global health crisis has subsided, I won't be able to check for you. Have you tried this yourself? I'm not sure what you mean by clock and sync settings?
There was an issue when we upgraded the project from 18.1 to 18.2 as the minimum sample frequency of the DAC was increased from 500Msps to 1000Msps, but this only affected the Vivado block design, not any of the sysgen IPs. I'm not aware of any substantial changes to the Xilinx IPs in Vivado 19.2 that couldn't be fixed by using the 'Upgrade IP' dialogue.
josh
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Closed as this project does not support Vivado 19.2.
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