Comments (5)
Hi @shipherd,
Thanks for details but I have extra comments and questions for you?
- Please check that prebuild FPGA image is working for you: scr1-sdk/images/arty/scr1 at master · syntacore/scr1-sdk (github.com)
- If you build bitstream and MCS by yourself, could you please check that bitstream is working and after that switch to MCS
- Please make sure that you select SPI FLASH chip correctly. Unfortunately, different chips may be on board (S25FL127S or S25FL128S): https://files.digilent.com/resources/programmable-logic/documents/S25FL127S_PCN.pdf
- And I'm pretty sure, our document was written for A35t which is slightly different with A100t
Best regards,
Alexander
from scr1.
Hi @achuykov-sc ,
- I was using the prebuild images. (which was cloned directly from the repository)
- Not using the self-build images.
- The SPI FLASH is labeled as shown below:
- Have you tested them on A7-35t before ? (Not the old Arty 35t)
Thank you :-)
from scr1.
Hi @shipherd,
The scr1-arty-fpga.7z (https://github.com/syntacore/scr1-sdk/blob/master/images/arty/scr1/scr1-arty-fpga.7z) contains bitstream (aka arty_scr1_new.bit) in addition to MCS. Could you please try the bitstream (arty_scr1_new.bit) first without MCS programming?
Please note, the A100t is incompatible with A35t bitstream.
Best regards,
Alexander
from scr1.
Hi @achuykov-sc ,
So, I am supposed to recompile everything for 100t board?
Thank you. :-)
from scr1.
Hi @achuykov-sc,
I had recompiled the Block Design project and the banner came up.
Thank you for your help :-)
from scr1.
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