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Wolv Z4 is a RISC-V CPU core with floating point unit

License: Apache License 2.0

Makefile 0.16% SystemVerilog 93.13% Shell 1.55% Python 4.43% Fortran 0.73%
core cpu fpga fpu hardware risc-v rv32

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wolv-z4's Issues

Using User-Defined instructions to your code

Hi there,
Good day. I was exploring riscv-z4 and was thinking that in which module of the design we can give the instructions to the processor(assembly) to generate the program's output. Can we give some assembly instructions to the processor to get the outputs? Your reply is appreciated.

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