Comments (1)
The output should output the value in the same cycle of input. So, my assumption is that no io.clock.step() is needed. However, when I did not step the clock, the generated waveform will not reflect the input I drive into the DUT.
If you are changing an input without a step
, only the final value before the step will be displayed in the waveform, I think.
Also, the circuit seems working properly even when I did not step the clock(
println(c.io.output.tmp_normDist.peek().litValue.toString(16))
works as expected).
That is expected for a combinatorial circuit. Generally we like to encode the expected value like this:
c.io.output.tmp_normDist.expect(0x41200000)
Then the testbench is self checking. Waveform output is mostly for debugging, not for checking correctness.
Even in the generated waveform when I setp the clock, the input seems changes during the falling edge of the clock, which is also a bit wired.
That is something that chiseltest has done since the beginning of time. Essentially inputs that you poke
all change on the falling clock edge and registers are updated on the rising edge. The idea behind this is that you might want to distinguish between combinatorial and sequential logic. However, many people - including me - would prefer to just have everything happen on the rising edge. I would love to change that, but don't have the time right now.
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Related Issues (20)
- Generate waveform file in real-time HOT 1
- chiseltest gets the signal name wrong when trying to peek, poke, or expect an OpaqueType HOT 3
- Solver Chosen Constants for Formal Verification HOT 3
- scala.NotImplementedError: TODO: convert ThrowOnFirstErrorAnnotation HOT 3
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- assertion failed: The Chisel compiler plugin is now required for compiling Chisel code HOT 1
- scala.NotImplementedError: TODO: convert DecodeTableAnnotatio HOT 7
- Will there be a chiseltest 6.0.0? HOT 16
- Frequent crash on macOS with the threaded Verilator backend HOT 6
- AXI4RAM test failed on chiseltest 5.0.2 HOT 2
- Cant ```import chiseltest._``` HOT 1
- Bitwuzla has changed it's command line argument format HOT 1
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- [Help]A TLRAM test failed log HOT 8
- What are the future use cases of ChiselTest if it is replaced by ChiselSim? HOT 4
- Who is the copyright holder of chiseltest and what is the license? HOT 1
- one step takes extremely long time to complete HOT 2
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