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An Open Hardware library for Chip and FPGA designers written in Verilog.
Module | Description |
---|---|
accelerator | A simple accelerator tutorial |
common | Library of generally useful components |
emesh | Emesh interface utility circuits |
elink | Point to point LVDS link |
emailbox | Simple mailbox with interrupt output |
emmu | Simple memory transaction translation unit |
xilibs | Simulation modules for Xilinx primitives |
The OH! repository source code is licensed under the MIT license unless otherwise specified. See LICENSE for MIT copyright terms. Design specific licenses can be found in the folder root (eg: aes/LICENSE)
Instructions for contributing can be found HERE.