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SpinalHDL - Cryptography libraries

License: MIT License

Scala 96.01% Java 3.99%

spinalhdl fpga crypto cryptography vhdl verilog rtl scala aes des

spinalcrypto's Introduction

About SpinalHDL

SpinalHDL is:

A language to describe digital hardware
Compatible with EDA tools, as it generates VHDL/Verilog files
Much more powerful than VHDL, Verilog, and SystemVerilog in its syntax and features
Much less verbose than VHDL, Verilog, and SystemVerilog
Not an HLS, nor based on the event-driven paradigm
Only generates what you asked it in a one-to-one way (no black-magic, no black box)
Not introducing area/performance overheads in your design (versus a hand-written VHDL/Verilog design)
Based on the RTL description paradigm, but can go much further
Allowing you to use Object-Oriented Programming and Functional Programming to elaborate your hardware and verify it
Free and can be used in the industry without any license

Get it

SpinalHDL is simply a set of Scala libraries. Include them into your project and you're good to go! If you're unsure about what to do, simply clone one of our example projects (see links above).

SBT (Scala build tool)

scalaVersion := "2.11.12"

libraryDependencies ++= Seq(
  "com.github.spinalhdl" % "spinalhdl-core_2.11" % "latest.release",
  "com.github.spinalhdl" % "spinalhdl-lib_2.11" % "latest.release",
  compilerPlugin("com.github.spinalhdl" % "spinalhdl-idsl-plugin_2.11" % "latest.release")
)

You can force SBT to pick a specific SpinalHDL version by replacing latest.release with a specific version. See the SpinalHDL SBT Template project's build.sbt file for a full SBT example.

Gradle

repositories {
	mavenCentral()
}

dependencies {
	compile group: 'com.github.spinalhdl', name: 'spinalhdl-core_2.11', version: '1.6.4'
	compile group: 'com.github.spinalhdl', name: 'spinalhdl-lib_2.11', version: '1.6.4'
}

Mill(Build Tool)

import mill._
import mill.scalalib._

object MySpinalModule extends ScalaModule {
  def scalaVersion = "2.11.12"

  def ivyDeps = Agg(
    ivy"com.github.spinalhdl::spinalhdl-core:1.6.4",
    ivy"com.github.spinalhdl::spinalhdl-lib:1.6.4",
  )

  def scalacPluginIvyDeps = Agg(ivy"com.github.spinalhdl::spinalhdl-idsl-plugin:1.6.4")
}

JAR

https://oss.sonatype.org/content/groups/public/com/github/spinalhdl/spinalhdl-core_2.11/
https://oss.sonatype.org/content/groups/public/com/github/spinalhdl/spinalhdl-lib_2.11/

The files are available on Maven as well.

Change logs

https://github.com/SpinalHDL/SpinalHDL/tags

License

The SpinalHDL core is using the LGPL3 license while SpinalHDL lib and others are using the MIT license. That's for the formalities. But there are some practical statements implied by those licenses:

Your freedoms are:

You can use SpinalHDL core and lib in your closed/commercial projects.
The generated RTL is yours (.vhd/.v files)
Your hardware description is yours (.scala files)

Your obligations (and my wish) are:

If you modify the SpinalHDL core (the compiler itself), please, share your improvements.

Also, SpinalHDL is provided "as is", without warranty of any kind.

spinalcrypto's People

Contributors

Stargazers

Watchers

Forkers

a4a881d4 xiaodianyan evantandersen iceshy jens-na muunqi dreamflyings lastweek mfkiwl mtvec unanime-labs jiegec jeffreyyunz dnltz marekpikula thorkn rbshi ruka58

spinalcrypto's Issues

Update Installation Guide (Wiki)

@Snoopy87 How can someone update the wiki?

The installation guide is in the wrong order and sbt uses now "publishLocal" AFAIK.

# Get the last version of SpinalCrypto
git clone https://github.com/SpinalHDL/SpinalCrypto.git
git pull origin master
cd SpinalCrypto
sbt publish-local

should be

# Get the last version of SpinalCrypto
git clone https://github.com/SpinalHDL/SpinalCrypto.git
cd SpinalCrypto
git pull origin master
sbt publishLocal

BTW: I think the git pull origin master is not necessary and can be removed.

How to use this lib

I want a document on how to use it，thank you!

Keep HashCoreIO.rsp.digest valid until next init

I've noticed while using the SHA2 core that the output digest stays valid until the core is initialized again. Would it be possible to guarantee this in the HashCoreIO spec? This could save us from having to create a register to store the digest if it's needed for more than one cycle.

Inheritance error occurred while using SHA2Core_Std()

I want to use the hash IP provided by Spinalcrypto, but when I tested them, I encountered an error message

[info] **********************************************************************************************
[info] [Warning] Elaboration failed (0 error).
[info]           Spinal will restart with scala trace to help you to find the problem.
[info] **********************************************************************************************
[info] [Progress] at 0.478 : Elaborate components
[error] Exception in thread "main" java.lang.AbstractMethodError: Receiver class spinal.crypto.hash.HashCoreIO does not define or inherit an implementation of the resolved method 'abstract void spinal$lib$IMasterSlave$$_isMasterInterface_$eq(scala.Option)' of interface spinal.lib.IMasterSlave.
[error]         at spinal.lib.IMasterSlave$class.$init$(MasterSlave.scala:14)
[error]         at spinal.crypto.hash.HashCoreIO.<init>(Hash.scala:74)
[error]         at spinal.crypto.hash.sha3.SHA3Core_Std.<init>(SHA3Core_Std.scala:50)
[error]         at SHA256.<init>(sha256.scala:26)
[error]         at Test_SHA256$$anonfun$1.apply(sha256_sim.scala:6)
[error]         at Test_SHA256$$anonfun$1.apply(sha256_sim.scala:6)
[error]         at spinal.core.internals.PhaseCreateComponent$$anonfun$impl$67.apply(Phase.scala:2561)
[error]         at spinal.core.fiber.Engine$$anonfun$create$1.apply$mcV$sp(AsyncCtrl.scala:173)
[error]         at spinal.core.fiber.AsyncThread$$anonfun$1.apply$mcV$sp(AsyncThread.scala:60)
[error]         at spinal.core.fiber.EngineContext$$anonfun$newJvmThread$1.apply$mcV$sp(AsyncCtrl.scala:39)
[error]         at spinal.sim.JvmThread.run(SimManager.scala:51)
[error] Nonzero exit code returned from runner: 1
[error] (Compile / run) Nonzero exit code returned from runner: 1
[error] Total time: 6 s, completed Jul 18, 2024, 8:10:16 PM

Here is my code, It simply initialized SHA2Core_Std(), I checked the source code of HashCoreIO() in hash.scale and found that it inherits from IMasterSlave, but sbt run still reports an error

import spinal.core._
import spinal.lib._

import spinal.crypto.hash._
import spinal.crypto.hash.sha2._
import spinal.crypto.hash.sha3._

class SHA256() extends Component
{
    val io = new Bundle
    {
        val init  = in Bool()

        val valid = in Bool()
        val ready = in Bool()
        val last  = in Bool()

        val msg_data_size = in UInt(80 bits)
        val msg_data      = in Bits(640 bits)

        val sha256_hash = out Bits(256 bits)
        val out_valid   = out Bool()
    }
    
    val sha256_core = new SHA2Core_Std(SHA2_256, 640 bits)

    sha256_core.io.init      := io.init
    sha256_core.io.cmd.valid := io.valid
    sha256_core.io.cmd.msg   := io.msg_data
    sha256_core.io.cmd.last  := io.last
    sha256_core.io.cmd.size  := io.msg_data_size
    sha256_core.io.cmd.ready := io.ready

    io.sha256_hash := sha256_core.io.rsp.digest
    io.out_valid   := sha256_core.io.rsp.valid

}

Here is the Sim code if Sha256

import spinal.core._
import spinal.core.sim._

object Test_SHA256 extends App
{
    SimConfig.withWave.compile(new SHA256()).doSim{ dut =>
        dut.io.init #= true

        dut.io.valid #= false
        dut.io.ready #= false

        dut.io.msg_data #= 0
        dut.io.msg_data_size #= 0

        dut.io.last #= false
        dut.io.msg_data #= 0

        sleep(2)

        dut.io.init #= false
        dut.io.valid #= true
        dut.io.ready #= true

        dut.io.msg_data #= 123
        dut.io.msg_data_size #= 8

        dut.io.last #= true

        sleep(2)
    }
}

Size Width Issues Encountered when using HMAC_SHA256

I tried combining SHA2Core_Std and HMACore_Std and created some assignments to test it, here is my code

class HMAC_SHA256() extends Component
{
    val io = new Bundle
    {
        val init  = in Bool()

        val valid = in Bool()
        val ready = out Bool()
        val last  = in Bool()

        val data_size = in UInt(4 bits)
        val msg_data  = in Bits(32 bits)
        val key_data  = in Bits(512 bits)

        val out_data    = out Bits(256 bits)
        val out_valid   = out Bool()
    }
    
    val sha256_core = new SHA2Core_Std(SHA2_256)
    val hmac_core = new HMACCore_Std(HMACCoreStdConfig(sha256_core.configCore.hashBlockWidth, sha256_core.configCore))

    hmac_core.io.hashCore <> sha256_core.io

    hmac_core.io.hmacCore.init      := io.init
    hmac_core.io.hmacCore.cmd.msg   := io.msg_data
    hmac_core.io.hmacCore.cmd.size  := io.data_size
    hmac_core.io.hmacCore.cmd.last  := io.last
    hmac_core.io.hmacCore.cmd.valid := io.valid
    hmac_core.io.hmacCore.cmd.key   := io.key_data

    io.ready := hmac_core.io.hmacCore.cmd.ready

    io.out_data  := hmac_core.io.hmacCore.rsp.hmac
    io.out_valid := hmac_core.io.hmacCore.rsp.valid
}

When I run it, it reports a size width error

[error] WIDTH MISMATCH (2 bits <- 8 bits) on (toplevel/hmac_core/io_hmacCore_cmd_payload_fragment_size : in UInt[2 bits]) := (toplevel/io_data_size : in UInt[8 bits]) at
[error]     HMAC_SHA256.<init>(hmac_sha256.scala:37)
[error]     Test_HMAC_SHA256$$anonfun$1.apply(hmac_sha256_sim.scala:6)
[error]     Test_HMAC_SHA256$$anonfun$1.apply(hmac_sha256_sim.scala:6)
[error]     spinal.sim.JvmThread.run(SimManager.scala:51)

So I checked the source code of Hmac and found that the width of size is the bitwidth of SHA2Core_Std divided by 8, the bitwidth of SHA2Core_Std is default 32 bits, so my setting is correct. This error makes me very confused

// source code from SpinalCrypto/blob/master/crypto/src/main/scala/spinal/crypto/mac/hmac/HMACCore_Std.scala
.......

/**
  * HMAC Cmd
  */
case class HMACCoreStdCmd(config: HMACCoreStdConfig) extends Bundle {
  val key  = Bits(config.keyWidth)
  val msg  = Bits(config.gHash.dataWidth)
  val size = UInt(log2Up(config.gHash.dataWidth.value / 8) bits)
}

......