Four Unibuses?

[ks10fpga]

Four Unibuses?

[jfcl]

Here is what I think I know.

KS10 IO addresses have 4 bits to select the IO device. As far as I can tell from reading the KS10 microcode, there is nothing that limits the number of devices to only two or three. Therefore I believe that the KS10 IO architecture could have addressed 15 devices (or Unibuses).

Device 0 is used to address the Console registers and the Memory Controller registers. These are internal to the KS10 and not out on a Unibus. These devices do occupy the address space that would have been used for UBA0 - therefore UBA0 is not a possibility.

Device 1 (or UBA1) is used exclusively by the RH11 Massbus Controller for performance reasons.

Device 2 (or UBA2) is apparently not wired on the KS10 backplane and is not accessible. I don't know why.

Device 3 (or UBA3) is used by the IO devices (TU45, LP20, DZ11, KMC11, DUP11, etc).

Device 4 (or UBA4) is wired on the backplane and can be used - although the DEC documentation only mentions UBA1 and UBA3. Timothe Litt says there were machines inside DEC that used UBA4.

UBA5 to UBA15 were never possible due to KS10 backplane implementation limitations - like UBA2.

Timothe Litt also said that "TOPS-20 looks at UBA1, UBA3, and UBA4. TOPS-10 actually looks for devices on all four but of course never finds UBA2 installed." I've personally never confirmed this.

I don't think it would have required any architecture changes to support 8x PDP11s.

I don't think it would be complicated to add this to SIMH but it would be a machine that never was.

[larsbrinkhoff]

Thanks for the information!

I think just one PDP-11 would be good enough, so no major surgery required on a real or simulated machine.