ITS microcode

[ks10fpga]

ITS microcode

[jfcl]

I have ITS microcode entitled "KSHACK". It's in the repository, but I've never tried to load it.

https://github.com/KS10FPGA/KS10FPGA/blob/master/fpga/ks10/cpu/useq/ks10_its.mcr

Is that it? Or do you have something different?

[larsbrinkhoff]

That's just the assember listing, right?

I have everything in the KSHACK directory, including microcode source code, assembler, and the assembled CRAM file.

[jfcl]

Yes. This is just the listing file.

The KS10 FPGA build system uses an AWK script to parse the microcode listing file, to extract the microcode, and to create Verilog code which initializes the Control RAM (ROM actually) and Dispatch ROM. I don't actually need binaries or source to create ITS microcode for the FPGA.

However, for completeness, please forward the code to me ([email protected]) and I'll add it to the directory with the other microcode. Thank you very much.

[larsbrinkhoff]

I made it a pull request: #10
Hope you don't mind.

[jfcl]

Pulled. Thank you.

[larsbrinkhoff]

Hello @jfcl,

There is a program which looks like it should test the ITS pager. We're not sure whether it works on all of KA10, KL10, KS10, or just some subset. Let me know if you want it.

[larsbrinkhoff]

https://github.com/PDP-10/its/blob/master/src/syseng/pt.2