Topic: digital-design Goto Github
Some thing interesting about digital-design
Some thing interesting about digital-design
digital-design,Simple Script to install LT Spice on a linux machine
User: 0xcabrex
digital-design,AdobeAllInOne is a comprehensive suite of creative software tools developed by Adobe. It includes a range of applications for design, photography, video editing, and more, making it the ultimate solution for all your creative needs.
User: adamkokeny23q2
digital-design,A repository containing the source codes for the Digital Design and Computer Organization Laboratory course (UE18CS2) at PES University.
User: aditeyabaral
digital-design,A simple up-down counter made using icarus verilog as a part of the Digital Design and Computer Organization course (UE18CS201) at PES University.
User: aditeyabaral
digital-design,A RISC custom-ISA, 16-Bit Processor
User: aitesam961
digital-design,A collection of my cources, lectures, articles and presentations
User: alexander-titov
digital-design,4 by 4 Karnaugh map solver
User: aliosm
digital-design,EE4415 Project : AES Verilog
User: anand270294
digital-design,A VHDL-based VGA driver to display 256 different colors on a monitor.
User: arasgungore
digital-design,Solutions for The Nand Game, a game that teaches the fundamentals of computing by building a computer from scratch.
User: arasgungore
Home Page: https://nandgame.com
digital-design,Sample Verilog codes for digital circuits
User: arvindelavari
digital-design,A VHDL-based VGA driver to implement a square 41x41 screensaver that cycles through 256 different colors.
Organization: aybaras
digital-design,📚 📖 📚CSE GATE Resources for GATE and CSE Aspirants 😎 😁 . Show your ❤️ by ⭐️⭐️
User: baquer
digital-design,An open source, parameterized SystemVerilog digital hardware IP library
User: bensampson5
Home Page: https://libsv.readthedocs.io/en/latest/
digital-design,SUSTech CS207 Digital Design 2018Fall Materials.
User: certseeds
digital-design,An experimental package manager and development tool for Hardware Description Languages (HDL).
User: chaseruskin
Home Page: https://c-rus.github.io/legoHDL
digital-design,An introduction to integrated circuit design with Verilog and the Papilio Pro development board.
User: defano
digital-design,Teaching Materials for Dr. Waleed A. Yousef
User: drwaleedayousef
Home Page: http://www.wy.helwan.edu.eg
digital-design,SystemVerilog examples for a digital design course
User: fcayci
digital-design,VHDL code examples for a digital design course
User: fcayci
digital-design,Introduction to FPGA emulation and digital design. This capstone project was part of the 2021 University of San Diego Shiley-Marcos School of Engineering & Computing Showcase.
User: fpgaemu
Home Page: http://fpgaemu.rtfd.org
digital-design,Fully pipelined DLX Microprocessor optimized for energy efficiency and testing purposes developed in VHDL. Simulation with Intel® ModelSim®, synthesis under Synopsys® DC Ultra™, and physical layout using Cadence® Innovus™ Implementation System.
User: gabrielganzer
digital-design,Design & Synthesis of several digital circuits in VHDL and Verilog. Scripting in TCL, simulation with Intel® ModelSim®, and synthesis under Synopsys® DC Ultra™.
User: gabrielganzer
digital-design,Comprehensive verification suite for the AHB2APB Bridge design, featuring SystemVerilog and UVM-based methodologies. 🌉🚀
User: ghonimo
digital-design,Washing Machine Controller Design Using VHDL.
User: hasancaslan
digital-design,Materials for the Computer Science course, Digital Design (Logic Circuits)
User: hosseinfani
digital-design,VHDL-by-HGB is a VS-Code extension for VHDL.
Organization: hsd-esd
Home Page: https://hsd-esd.github.io/VHDL-by-HGB/
digital-design,A collection of my cources, lectures, articles and presentations
User: igorsmir-ilab
digital-design,Implementaciones para diseño de sistemas digitales, comenzando por Flip Flops, registros, autómatas (Máquinas de Moore y Máquinas de Mealy), memorias ROM y sensores de presencia, utilizando para cada uno de estos, distintos contadores (anillo, década, etc).
User: joelromero97
digital-design,SEP, for Simple Enough Processor, is an elaborated from scratch simulated (on Logisim) educational CPU
User: kara-abdelaziz
digital-design,Thesis covers research on digital signal processing with software defined radio techniques applied in FPGA environment. It is written entirely in Polish language, except english abstract
User: lstolcman
digital-design,RTL description, synthesis and physical design of a 4-stage pipelined 32bit RISC processor
User: luca-dalmasso
digital-design,Generator for wokwi schematics that implement lookup tables in conjunctive normal form (CNF), i.e. with AND and OR gates
User: maehw
digital-design,Python script for generating lookup tables for the gm/ID design methodology and much more ...
User: medwatt
digital-design,A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.
User: meiniki
digital-design,🖋 Typeset Quartus II schematics using TikZ (LaTeX)
User: mildsunrise
digital-design,Lectures on Digital Design
Organization: mipt-ilab
digital-design,Distributed arithmetic (DA) is another way of implementing a dot product where one of the arrays has constant elements. The DA can be effectively used to implement FIR, IIR and FFT type.The DA logic replaces the MAC operation of convolution summation o into a bit-serial look-up table read and addition operation .
User: mnmhdanas
digital-design,Router 1 x 3 verilog implementation
User: mnmhdanas
digital-design,UART - RTL Design and Verification
User: mnmhdanas
digital-design,The project uses a Xilinx Artix-7 FPGA on a Digilent Basys 3 board to design a clock whose seconds, minutes, & hours are displayed on a Quad 7-segment display & can also be displayed on a vga display. Picoblaze processor is used to control the Analog & Digital displays of the clock.
User: muhammadaldacher
digital-design,FPGA Cryptography for High-Level Synthesis
User: petrsocha
digital-design,VHDL Code Dump for Digital Circuits Lab (EE214), Spring 2017
User: robodhruv
digital-design,Synthesizable SystemVerilog IP-Cores of the Forward and Backward Clarke Transformation
User: rubinsteina13
Home Page: https://en.wikipedia.org/wiki/Alpha%E2%80%93beta_transformation
digital-design,An NPU designed using an LLM with a single prompt
User: selimsandal
digital-design,32 bit pipelined binary floating point adder using IEEE-754 Single Precision Format in Verilog
User: shahsaumya00
digital-design,RTL implementation for Advanced Encryption Standard (AES) in Verilog. Synthesis Done in Synopsys DC.
User: tatan432
digital-design,This repository hosts the code for an FPGA based accelerator for convolutional neural networks
User: thedatabusdotio
Home Page: https://thedatabus.io
digital-design,2023 Fall CS207 Digital Design Course Project with 120/100 (Full Score)
User: wluow
digital-design,This project is to implement a combination lock on the FPGA board using VHDL language and finite state machine. There are some possible solutions are provided to address the problems including debounce, random number generation and combination check.
User: yuanbo-peng
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